Enterprise Systems Architecture 390 Reference Summary

Enterprise Systems Architecture/390

IBM

Reference Summary

SA22-7209-04

Enterprise Systems Architecture/390

IBM

Reference Summary

SA22-7209-04

Fifth Edition (June, 2003) This revision differs from the previous edition by containing minor | corrections, instructions related to the facilities marked by a bar under “Facility” in “Preface,” and fields related to new I/O facilities. | Additionally, in the sections “Machine Instruction Formats” and | “Machine Instructions by Operation Code,” multiple instances of | the same instruction format are identified by a subscript. Changes are indicated by a bar in the margin. References in this publication to IBM products, programs, or services do not imply that IBM intends to make these available in all countries in which IBM operates. Any reference to an IBM program product in this publication is not intended to state or imply that only IBM's program product may be used. Any functionally equivalent program may be used instead. Requests for copies of this and other IBM publications should be made to your IBM representative or to the IBM branch office serving your locality. Please direct any comments on the contents of this publication to IBM Corporation Department E57 2455 South Road Poughkeepsie, NY 12601-5400 USA IBM may use or distribute whatever information you supply in any way it believes appropriate without incurring any obligation to you.  Copyright International Business Machines Corporation 1994-2003. All rights reserved. US Government Users Restricted Rights – Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp.

Preface This publication is intended primarily for use by Enterprise Systems Architecture/390 (ESA/390) assembler-language application programmers. It contains basic machine information summarized from the IBM ESA/390 Principles of Operation, SA22-7201, about the S/390 and zSeries processors. It also contains frequently used information from IBM ESA/390 Vector Operations, SA22-7207, IBM ESA/390 Data Compression, SA22-7208, IBM ESA/390 Common I/O-Device Commands and Self Description, SA22-7204, IBM System/370 Extended Architecture Interpretive Execution, SA22-7095, and IBM High Level Assembler for MVS & VM & VSE Language Reference, SC26-4940. This publication will be updated from time to time. However, the above publications and others cited in this publication are the authoritative reference sources and will be first to reflect changes. As a possible convenience to the reader, this publication carries forward most of the device information in the previous edition. This information has not been updated. The following instructions may be uninstalled or not available on a particular model: Facility Additional floating point Basic vector Branch and set authority Cancel I/O Checksum Compare and move extended Compression Expanded storage Extended TOD clock Extended translation 1 Extended translation 2 | HFP multiply-and-add/subtract | Immediate and relative Load VIX | Message-security assist | Multiply then add/subtract Perform locked operation Program call fast Resume program Set address space control fast Store system information String Square root Subspace group Trap

Instruction (All instructions marked with “a” in “Class & Notes” column) (All instructions with mnemonics that start with “V” except as listed below) BSA XSCH CKSM CLCLE, MVCLE CMPSC PGIN, PGOUT SCKPF, STCKE CUTFU, CUUTF, TRE CLCLU, MVCLU, PKA, PKU, TP, TROO, TROT, TRTO, TRTT, UNPKA, UNPKU MAD, MADR, MAE, MAER, MSD, MSDR, MSE, MSER AHI, BRAS, BRC, BRCT, BRXH, BRXLE, CHI, LHI, MHI, MS, MSR, TMH, TML VLVXA KM, KMC, KIMD, KLMD, KMAC VTAD, VTAE, VTSD, VTSE PLO PCF RP SACF STSI CLST, MVST, SRST SQDR, SQER BSG TRAP2, TRAP4

IBM, Enterprise Systems Architecture/390, ESA/390, S/390, and zSeries are trademarks of the International Business Machines Corporation.

 Copyright IBM Corp. 1994-2003

iii

Facility Vector square root z/Architecture instructions

Instruction VSQD, VSQDR, VSQE, VSQER ALC, ALCR, BRASL, BRCL, DL, DLR, EPSW, LARL, LRV, LRVH, LRVR, ML, MLR, RLL, SAM24, SAM31, SLB, SLBR, STFL, STRV, STRVH, TAM

For information about System/370 architecture, refer to IBM System/370 Principles of Operation, GA22-7000, and IBM System/370 Reference Summary, GX20-1850. For information about System/370 extended architecture, refer to IBM System/370 Extended Architecture Principles of Operation, SA22-7085, and IBM System/370 Extended Architecture Reference Summary, GX20-0157. For information about Enterprise Systems Architecture/370 architecture, refer to IBM Enterprise Systems Architecture/370 Principles of Operation, SA22-7200, IBM Enterprise Systems Architecture/370 and System/370 Vector Operations, SA22-7125, and IBM Enterprise Systems Architecture/370 Reference Summary, GX20-0406. For information about z/Architecture, refer to IBM z/Architecture Principles of Operation, SA22-7832, and IBM z/Architecture Reference Summary, SA22-7871.

z/Architecture, System/370, and Enterprise Systems Architecture/370 are trademarks of the International Business Machines Corporation.

iv

ESA/390 Reference Summary

Contents Preface . . . . . . . . . . . . . . . . . . . . . . . . . . Machine Instruction Formats . . . . . . . . . . . . . . . Machine Instructions by Mnemonic . . . . . . . . . . . . Machine Instructions by Operation Code . . . . . . . . . Condition Codes . . . . . . . . . . . . . . . . . . . . . . | Operand of Store Clock . . . . . . . . . . . . . . . . . . Operand of Store Clock Extended . . . . . . . . . . . . Assembler Instructions . . . . . . . . . . . . . . . . . . Extended-Mnemonic Instructions for Branch on Condition Extended-Mnemonic Instructions for Relative-Branch Instructions . . . . . . . . . . . . . . . . . . . . . . . CNOP Alignment . . . . . . . . . . . . . . . . . . . . . Summary of Constants . . . . . . . . . . . . . . . . . . Fixed Storage Locations . . . . . . . . . . . . . . . . . . External-Interruption Codes . . . . . . . . . . . . . . . . Program-Interruption Codes . . . . . . . . . . . . . . . . Exception-Extension Code . . . . . . . . . . . . . . . . Translation-Exception Identification . . . . . . . . . . . . Data-Exception Code (DXC) . . . . . . . . . . . . . . . Control Registers . . . . . . . . . . . . . . . . . . . . . Floating-Point-Control (FPC) Register . . . . . . . . . . . Program-Status Word (PSW) . . . . . . . . . . . . . . . Vector-Status Register . . . . . . . . . . . . . . . . . . Dynamic Address Translation . . . . . . . . . . . . . . . Dynamic-Address-Translation Format . . . . . . . . . Segment-Table Designation (STD) . . . . . . . . . . . Segment-Table Entry (STE) . . . . . . . . . . . . . . Page-Table Entry (PTE) . . . . . . . . . . . . . . . . ASN Translation . . . . . . . . . . . . . . . . . . . . . . Address-Space Number (ASN) . . . . . . . . . . . . ASN-First-Table Entry (when CR0 Bit 15 Is Zero) . . . ASN-First-Table Entry (when CR0 Bit 15 Is One) . . . ASN-Second-Table Entry (ASTE) . . . . . . . . . . . PC-Number Translation . . . . . . . . . . . . . . . . . . Program-Call Number . . . . . . . . . . . . . . . . . Linkage-Table Entry (LTE) . . . . . . . . . . . . . . . Entry-Table Entry (ETE) . . . . . . . . . . . . . . . . Access-Register Translation . . . . . . . . . . . . . . . . Access-List-Entry Token (ALET) . . . . . . . . . . . . Dispatchable-Unit-Control Table (DUCT) . . . . . . . Access-List Entry (ALE) . . . . . . . . . . . . . . . . Linkage-Stack Entries . . . . . . . . . . . . . . . . . . . Entry Descriptor . . . . . . . . . . . . . . . . . . . . Header Entry (Entry Type 0000001) . . . . . . . . . . Trailer Entry (Entry Type 0000010) . . . . . . . . . . Branch State Entry (Entry Type 0000100) and Program-Call State Entry (Entry Type 0000101) . . Trapping . . . . . . . . . . . . . . . . . . . . . . . . . . Trap Control Block . . . . . . . . . . . . . . . . . . . Trap Save Area . . . . . . . . . . . . . . . . . . . . Trace-Entry Formats . . . . . . . . . . . . . . . . . . . . 31-Bit Branch . . . . . . . . . . . . . . . . . . . . . . 24-Bit Branch . . . . . . . . . . . . . . . . . . . . . . Branch in Subspace Group (if ASN Tracing On) . . . Set Secondary ASN . . . . . . . . . . . . . . . . . . Program Call . . . . . . . . . . . . . . . . . . . . . . Program Transfer . . . . . . . . . . . . . . . . . . . . Program Return . . . . . . . . . . . . . . . . . . . . Trace . . . . . . . . . . . . . . . . . . . . . . . . . .  Copyright IBM Corp. 1994-2003

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12 15 20 20 20 .21 22 22 23 23 24 25 26 26 26 27 29 29 29 30 30 30 30 30 30 30 30 31 31 32 32 32 32 33 33 33 34 35 35 35 35 36 37 37 38 39 39 39 39 39 39 39 39 39 v

Machine-Check Interruption Code . . . . . . . . . . . External-Damage Code . . . . . . . . . . . . . . . . Operation-Request Block (ORB) . . . . . . . . . . . Channel-Command Word (CCW) . . . . . . . . . . . Format-0 CCW . . . . . . . . . . . . . . . . . . . Format-1 CCW . . . . . . . . . . . . . . . . . . . Indirect-Data-Address Word (IDAW) . . . . . . . . . Format-1 IDAW . . . . . . . . . . . . . . . . . . . Format-2 IDAW . . . . . . . . . . . . . . . . . . . Subchannel-Information Block (SCHIB) . . . . . . . . Path-Management-Control Word (PMCW) . . . . . Interruption-Response Block (IRB) . . . . . . . . . . Subchannel-Status Word (SCSW) . . . . . . . . . Extended-Status Word (ESW) . . . . . . . . . . . Information Stored in ESW . . . . . . . . . . . . . Extended-Control Word (ECW) . . . . . . . . . . | Extended-Measurement Word . . . . . . . . . . . | Format-0 Measurement Block . . . . . . . . . . . . . | Format-1 Measurement Block . . . . . . . . . . . Channel-Report Word (CRW) . . . . . . . . . . . . . Error-Recovery Codes . . . . . . . . . . . . . . . Reporting Source . . . . . . . . . . . . . . . . . . I/O Command Codes . . . . . . . . . . . . . . . . . Standard Command-Code Assignments (CCW Bits 0-7) . . . . . . . . . . . . . . . . . . . . . . . . Standard Meanings of Bits of First Sense Byte . . Console Printer Channel Commands . . . . . . . Printer Channel Commands . . . . . . . . . . . . Magnetic-Tape Channel Commands . . . . . . . . DASD Channel Commands . . . . . . . . . . . . Code Assignments . . . . . . . . . . . . . . . . . . Code Table . . . . . . . . . . . . . . . . . . . . . Control Character Representations . . . . . . . . Additional ISO-8 Control Character Representations Formatting Character Representations . . . . . . . Two-Character BSC Data Link Controls . . . . . . Commonly Used Editing Pattern Characters . . . . ANSI-Defined Printer Control Characters . . . . . Hexadecimal and Decimal Conversion . . . . . . . . Powers of 2 and 16 . . . . . . . . . . . . . . . .

vi

ESA/390 Reference Summary

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40 40 41 41 41 42 42 42 42 43 43 44 44 45 46 47 47 47 48 48 48 49 49

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49 49 49 50 51 52 54 54 60 61 61 61 61 61 61 63

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NOTES

1

Machine Instruction Formats

E

| | | |

I

| RI

| | RI | | | RIL

| RIL

RR

RRE

| RRF

| RRF

| RRF

| RS

2

┌───────────────────┬───────────────────┬───────────────────┐ │ First Halfword │ Second Halfword │ Third Halfword │ └───────────────────┴───────────────────┴───────────────────┘ │ │ │ │ ┌───────────────────┐ │ │ │ Op Code │ │ │ └───────────────────┘ │ │ 15 │ │ │ │ │ │ ┌─────────┬─────────┐ │ │ │ Op Code │ I │ │ │ └─────────┴─────────┘ │ │ 8 15 │ │ │ │ │ │ ┌─────────┬────┬────┬───────────────────┐ │ │ Op Code │ R │OpCd│ I │ │ └─────────┴────┴────┴───────────────────┘ │ 8 12 16 31 │ │ │ │ │ ┌─────────┬────┬────┬───────────────────┐ │ │ Op Code │ M │OpCd│ I │ │ └─────────┴────┴────┴───────────────────┘ │ 8 12 16 31 │ │ │ │ │ ┌─────────┬────┬────┬───────────────────────────────────────┐ │ Op Code │ R │OpCd│ I │ └─────────┴────┴────┴───────────────────────────────────────┘ 8 12 16 47 │ │ │ │ ┌─────────┬────┬────┬───────────────────────────────────────┐ │ Op Code │ M │OpCd│ I │ └─────────┴────┴────┴───────────────────────────────────────┘ 8 12 16 │ 47 │ │ │ │ ┌─────────┬────┬────┐ │ │ │ Op Code │ R │ R │ │ │ └─────────┴────┴────┘ │ │ 8 12 15 │ │ │ │ │ │ ┌───────────────────┬─────────┬────┬────┐ │ │ Op Code │/////////│ R │ R │ │ └───────────────────┴─────────┴────┴────┘ │ 16 24 28 31 │ │ │ │ │ ┌───────────────────┬────┬────┬────┬────┐ │ │ Op Code │ R │////│ R │ R │ │ └───────────────────┴────┴────┴────┴────┘ │ 16 2 24 28 31 │ │ │ │ │ ┌───────────────────┬────┬────┬────┬────┐ │ │ Op Code │ M │////│ R │ R │ │ └───────────────────┴────┴────┴────┴────┘ │ 16 2 24 28 31 │ │ │ │ │ ┌───────────────────┬────┬────┬────┬────┐ │ │ Op Code │ R │ M │ R │ R │ │ └───────────────────┴────┴────┴────┴────┘ │ 16 2 24 28 31 │ │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┐ │ │ Op Code │ R │ R │ B │ D │ │ └─────────┴────┴────┴────┴──────────────┘ │ 8 12 16 2 31 │

ESA/390 Reference Summary

Machine Instruction Formats (Cont'd)

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┌───────────────────┬───────────────────┬───────────────────┐ │ First Halfword │ Second Halfword │ Third Halfword │ └───────────────────┴───────────────────┴───────────────────┘ │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┐ │ RS │ Op Code │ R │ M │ B │ D │ │ └─────────┴────┴────┴────┴──────────────┘ │ 8 12 16 2 31 │ │ │ │ │ RSE ┌─────────┬────┬────┬────┬──────────────┬─────────┬─────────┐ (non-│ Op Code │ R │ R │ B │ D │/////////│ Op Code │ vec.)└─────────┴────┴────┴────┴──────────────┴─────────┴─────────┘ 8 12 16 2 32 4 47 │ │ │ │ ┌─────────┬────┬────┬───────────────────┐ │ RSI │ Op Code │ R │ R │ I │ │ └─────────┴────┴────┴───────────────────┘ │ 8 12 16 31 │ │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┬─────────┬─────────┐ RSL │ Op Code │ L │////│ B │ D │/////////│ Op Code │ └─────────┴────┴────┴────┴──────────────┴─────────┴─────────┘ 8 12 16 2 32 4 47 │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┐ │ RX │ Op Code │ R │ X │ B │ D │ │ └─────────┴────┴────┴────┴──────────────┘ │ 8 12 16 2 31 │ │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┬─────────┬─────────┐ RXE │ Op Code │ R │ X │ B │ D │/////////│ Op Code │ └─────────┴────┴────┴────┴──────────────┴─────────┴─────────┘ 8 12 16 2 32 4 47 │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┬────┬────┬─────────┐ RXF │ Op Code │ R │ X │ B │ D │ R │////│ Op Code │ └─────────┴────┴────┴────┴──────────────┴────┴────┴─────────┘ 8 12 16 2 32 4 47 │ │ │ │ ┌───────────────────┬────┬──────────────┐ │ S │ Op Code │ B │ D │ │ └───────────────────┴────┴──────────────┘ │ 16 2 31 │ │ │ │ │ ┌─────────┬─────────┬────┬──────────────┐ │ SI │ Op Code │ I │ B │ D

│ │ └─────────┴─────────┴────┴──────────────┘ │ 8 16 2 31 │ │ │ │ │ ┌─────────┬─────────┬────┬──────────────┬────┬──────────────┐ SS │ Op Code │ L │ B │ D

│ B │ D │ └─────────┴─────────┴────┴──────────────┴────┴──────────────┘ 8 16 2 32 36 47 │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┬────┬──────────────┐ SS │ Op Code │ L │ L │ B │ D

│ B │ D │ └─────────┴────┴────┴────┴──────────────┴────┴──────────────┘ 8 12 16 2 32 36 47 │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┬────┬──────────────┐ SS │ Op Code │ L │ I │ B │ D

│ B │ D │ └─────────┴────┴────┴────┴──────────────┴────┴──────────────┘ 8 12 16 2 32 36 47 │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┬────┬──────────────┐ SS │ Op Code │ R │ R │ B │ D

│ B │ D │ └─────────┴────┴────┴────┴──────────────┴────┴──────────────┘ 8 12 16 2 32 36 47

3

Machine Instruction Formats (Cont'd)

┌───────────────────┬───────────────────┬───────────────────┐ │ First Halfword │ Second Halfword │ Third Halfword │ └───────────────────┴───────────────────┴───────────────────┘ │ │ │ │ ┌─────────┬────┬────┬────┬──────────────┬────┬──────────────┐ | SS │ Op Code │ R │ R │ B │ D │ B │ D │ └─────────┴────┴────┴────┴──────────────┴────┴──────────────┘ 8 12 16 2 32 36 47 │ │ │ │ ┌───────────────────┬────┬──────────────┬────┬──────────────┐ SSE │ Op Code │ B │ D

│ B │ D │ └───────────────────┴────┴──────────────┴────┴──────────────┘ 16 2 32 36 47 │ │ │ │ ┌───────────────────┬────┬────┬────┬────┐ │ QST │ Op Code │QR │RT │VR │RS │ │ └───────────────────┴────┴────┴────┴────┘ │ 16 2 24 28 31 │ │ │ │ │ ┌───────────────────┬────┬────┬────┬────┐ │ QV │ Op Code │QR │////│VR │VR │ │ └───────────────────┴────┴────┴────┴────┘ │ 16 2 24 28 31 │ │ │ │ │ RSE ┌───────────────────┬────┬────┬────┬────┬────┬──────────────┐ (vec.│ Op Code │ R │////│VR │////│ B │ D │ only)└───────────────────┴────┴────┴────┴────┴────┴──────────────┘ 16 2 24 28 32 36 47 │ │ │ ┌───────────────────┬────┬────┬────┬────┐ VR │ Op Code │QR │////│VR │GR │ └───────────────────┴────┴────┴────┴────┘ 16 2 24 28 31 │ │ │ ┌───────────────────┬──────────────┬────┐ VS │ Op Code │//////////////│RS │ └───────────────────┴──────────────┴────┘ 16 28 31 │ │ │ ┌───────────────────┬────┬────┬────┬────┐ VST │ Op Code │VR │RT │VR │RS │ └───────────────────┴────┴────┴────┴────┘ 16 2 24 28 31 │ │ │ ┌───────────────────┬────┬────┬────┬────┐ VV │ Op Code │VR │////│VR │VR │ └───────────────────┴────┴────┴────┴────┘ 16 2 24 28 31

| | |

, , , : B , B, B : D , D, D : GR: I, I: L, L , L: M , M , M : QR : R , R, R : RS: RT: VR , VR, VR : X:

4

Denotes association with first, second, third, or fourth operand; distinguishes among multiple instances of the same instruction format Base register designation field Displacement field Register designation field (general register) Immediate operand field Length field Mask field Register designation field (equivalent to GR if general register, or FR if floating-point register) Register designation field Register designation field (starting address of vector) Register designation field (stride of vector) Register designation field (vector register) Index register designation field

ESA/390 Reference Summary

Machine Instructions by Mnemonic

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Mnemonic A AD ADB ADBR ADR AE AEB AEBR AER AH AHI AL ALC ALCR ALR AP AR AU AUR AW AWR AXBR AXR BAKR BAL BALR BAS BASR BASSM

Operands R ,D(X,B) R ,D(X,B) R ,D(X,B) R ,R R ,R R ,D(X,B) R ,D(X,B) R ,R R ,R R ,D(X,B) R ,I R ,D(X,B) R ,D(X,B) R ,R R ,R D (L ,B ),D(L,B) R ,R R ,D(X,B) R ,R R ,D(X,B) R ,R R ,R R ,R R ,R R ,D(X,B) R ,R R ,D(X,B) R ,R R ,R

BC BCR BCT BCTR BRAS BRASL

M ,D(X,B) M ,R R ,D(X,B) R ,R R ,I R ,I

BRC BRCL

M ,I M ,I

BRCT BRXH BRXLE

R ,I R ,R ,I R ,R ,I

BSA BSG BSM BXH BXLE C CD CDB CDBR CDFBR CDFR CDR CDS CEB CE CEBR CEFBR CEFR CER CFC CFDBR CFDR CFEBR CFER CFXBR CFXR CH CHI CKSM CL CLC CLCL CLCLE

R ,R R ,R R ,R R ,R ,D(B) R ,R ,D(B) R ,D(X,B) R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R ,R R ,R ,D(B) R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R ,R D(B) R ,M ,R R ,M ,R R ,M ,R R ,M ,R R ,M ,R R ,M ,R R ,D(X,B) R ,I R ,R R ,D(X,B) D (L,B ),D(B) R ,R R ,R ,D(B)

CLCLU

R ,R ,D(B)

CLI CLM

D (B ),I R ,M ,D(B)

CLR R ,R CLST R ,R CMPSC R ,R

Name Add Add Normalized (LH) Add (LB) Add (LB) Add Normalized (LH) Add Normalized (SH) Add (SB) Add (SB) Add Normalized (SH) Add Halfword Add Halfword Immediate Add Logical Add Logical with Carry Add Logical with Carry Add Logical Add Decimal Add Add Unnormalized (SH) Add Unnormalized (SH) Add Unnormalized (LH) Add Unnormalized (LH) Add (EB) Add Normalized (EH) Branch and Stack Branch and Link Branch and Link Branch and Save Branch and Save Branch and Save and Set Mode Branch on Condition Branch on Condition Branch on Count Branch on Count Branch Relative and Save Branch Relative and Save Long Branch Relative on Condition Branch Relative on Condition Long Branch Relative on Count Branch Relative on Index High Branch Relative on Index Low or Equal Branch and Set Authority Branch in Subspace Group Branch and Set Mode Branch on Index High Branch on Index Low or Equal Compare Compare (LH) Compare (LB) Compare (LB) Convert from Fixed (32/LB) Convert from Fixed (32/LH) Compare (LH) Compare Double and Swap Compare (SB) Compare (SH) Compare (SB) Convert from Fixed (32/SB) Convert from Fixed (32/SH) Compare (SH) Compare and Form Codeword Convert to Fixed (LB/32) Convert to Fixed (LH/32) Convert to Fixed (SB/32) Convert to Fixed (SH/32) Convert to Fixed (EB/32) Convert to Fixed (EH/32) Compare Halfword Compare Halfword Immediate Checksum Compare Logical Compare Logical Compare Logical Long Compare Logical Long Extended Compare Logical Long Unicode Compare Logical Compare Logical Characters under Mask Compare Logical Compare Logical String Compression Call

Format RX RX RXE RRE RR RX RXE RRE RR RX RI

RX RXE RRE RR SS RR RX RR RX RR RRE RR RRE RX RR RX RR RR

Op Code 5A 6A ED1A B31A 2A 7A ED0A B30A 3A 4A A7A 5E E398 B998 1E FA 1A 7E 3E 6E 2E B34A 36 B240 45 05 4D 0D 0C

RX RR RX RR RI

RIL

47 07 46 06 A75 C05

RI RIL

A74 C04

RI

RSI RSI

A76 84 85

RRE RRE RR RS

RS

RX RX RXE RRE RRE RRE RR RS

RXE RX RRE RRE RRE RR S RRF RRF RRF RRF RRF RRF RX RI

RRE RX SS

RR RS

B25A B258 0B 86 87 59 69 ED19 B319 B395 B3B5 29 BB ED09 79 B309 B394 B3B4 39 B21A B399 B3B9 B398 B3B8 B39A B3BA 49 A7E B241 55 D5 0F A9

Class & Notes c c ac ac c c ac ac c c c c c c c c c c c c c ac c q

q

c c ac ac a a c c ac c ac a a c ic ac ac ac ac ac ac c c c c c ic c

RSE

EB8F

c

SI RS

95 BD

c c

RR RRE RRE

15 B25D B263

c c ic

5

Machine Instructions by Mnemonic (Cont'd)

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Mnemonic CP CPYA CR CS CSCH CSP CUSE CUTFU CUUTF CVB CVD CXBR CXFBR CXFR CXR D DD DDB DDBR DDR DE DEB DEBR DER DIDBR DIEBR DL DLR DP DR DXBR DXR EAR ED EDMK EFPC EPAR EPSW EREG ESAR ESTA EX FIDBR FIDR FIEBR FIER FIXBR FIXR HDR HER HSCH IAC IC ICM IPK IPM IPTE ISKE IVSK KDB KDBR KEB KEBR KIMD

Name Compare Decimal Copy Access Compare Compare and Swap Clear Subchannel R ,R Compare and Swap and Purge R ,R Compare until Substring Equal R ,R Convert UTF-8 to Unicode R ,R Convert Unicode to UTF-8 R ,D(X,B) Convert to Binary R ,D(X,B) Convert to Decimal R ,R Compare (EB) R ,R Convert from Fixed (32/EB) R ,R Convert from Fixed (32/EH) R ,R Compare (EH) R ,D(X,B) Divide R ,D(X,B) Divide (LH) R ,D(X,B) Divide (LB) R ,R Divide (LB) R ,R Divide (LH) R ,D(X,B) Divide (SH) R ,D(X,B) Divide (SB) R ,R Divide (SB) R ,R Divide (SH) R ,R ,R,M Divide to Integer (LB) R ,R ,R,M Divide to Integer (SB) R ,D(X,B) Divide Logical R ,R Divide Logical D (L ,B ),D(L,B) Divide Decimal R ,R Divide R ,R Divide (EB) R ,R Divide (EH) R ,R Extract Access D (L,B ),D(B) Edit D (L,B ),D(B) Edit and Mark R

Extract FPC R

Extract Primary ASN R ,R Extract PSW R ,R Extract Stacked Registers R

Extract Secondary ASN R ,R Extract Stacked State R ,D(X,B) Execute R ,M ,R Load FP Integer (LB) R ,R Load FP Integer (LH) R ,M ,R Load FP Integer (SB) R ,R Load FP Integer (SH) R ,M ,R Load FP Integer (EB) R ,R Load FP Integer (EH) R ,R Halve (LH) R ,R Halve (SH) Halt Subchannel R

Insert Address Space Control R ,D(X,B) Insert Character R ,M ,D(B) Insert Characters under Mask Insert PSW Key R

Insert Program Mask R ,R Invalidate Page Table Entry R ,R Insert Storage Key Extended R ,R Insert Virtual Storage Key R ,D(X,B) Compare and Signal (LB) R ,R Compare and Signal (LB) R ,D(X,B) Compare and Signal (SB) R ,R Compare and Signal (SB) R ,R Compute Intermediate Message Digest KLMD R ,R Compute Last Message Digest KM R ,R Cipher Message KMAC R ,R Compute Message Authentication Code KMC R ,R Cipher Message with Chaining KXBR R ,R Compare and Signal (EB) L R ,D(X,B) Load LA R ,D(X,B) Load Address LAE R ,D(X,B) Load Address Extended LAM R ,R ,D(B) Load Access Multiple LARL R ,I Load Address Relative Long LASP D (B ),D(B) Load Address Space Parameters LCDBR R ,R Load Complement (LB) LCDR R ,R Load Complement (LH) LCEBR R ,R Load Complement (SB) LCER R ,R Load Complement (S) LCR R ,R Load Complement LCTL R ,R ,D(B) Load Control LCXBR R ,R Load Complement (EB) LCXR R ,R Load Complement (EH) LD R ,D(X,B) Load (L) LDE R ,D(X,B) Load Lengthened (SH/LH) LDEB R ,D(X,B) Load Lengthened (SB/LB)

6

Operands D (L ,B ),D(L,B) R ,R R ,R R ,R ,D(B)

ESA/390 Reference Summary

Class & Notes c

Format SS RRE RR RS

S RRE RRE RRE RRE RX RX RRE RRE RRE RRE RX RX RXE RRE RR RX RXE RRE RR RRF RRF RXE RRE SS RR RRE RRE RRE SS

SS

RRE RRE RRE RRE RRE RRE RX RRF RRE RRF RRE RRF RRE RR RR S RRE RX RS S RRE RRE RRE RRE RXE RRE RXE RRE RRE

Op Code F9 B24D 19 BA B230 B250 B257 B2A7 B2A6 4F 4E B349 B396 B3B6 B369 5D 6D ED1D B31D 2D 7D ED0D B30D 3D B35B B353 E397 B997 FD 1D B34D B22D B24F DE DF B38C B226 B98D B249 B227 B24A 44 B35F B37F B357 B377 B347 B367 24 34 B231 B224 43 BF B20B B222 B221 B229 B223 ED18 B318 ED08 B308 B93E

RRE RRE RRE

B93F B92E B91E

c MS c MS c MS

RRE RRE RX RX RX RS

RIL

SSE

B92F B348 58 41 51 9A C00 E500

c MS ac

RRE RR RRE RR RR RS

RRE RRE RX RXE RXE

B313 23 B303 33 13 B7 B343 B363 68 ED24 ED04

ac c ac c c p ac ac

c c pc pc ic c c ac a a ac a a a a ac ac

a c c a q q c a a a a a a pc qc c q p p q ac ac ac ac c MS

pc

a a

Machine Instructions by Mnemonic (Cont'd)

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Mnemonic LDEBR LDER LDR LDXBR LDXR LE LEDBR LEDR LER LEXBR LEXR LFPC LH LHI LM LNDBR LNDR LNEBR LNER LNR LNXBR LNXR LPDBR LPDR LPEBR LPER LPR LPSW LPXBR LPXR LR LRA LRDR LRER LRV LRVH LRVR LTDBR LTDR LTEBR LTER LTR LTXBR LTXR LURA LXD LXDB LXDBR LXDR LXE LXEB LXEBR LXER LXR LZDR LZER LZXR M MAD MADB MADBR MADR MAE MAEB MAEBR MAER MC MD MDB MDBR MDE MDEB MDEBR MDER MDR ME MEE MEEB MEEBR MEER MER MH MHI ML MLR MP MR MS MSCH

Operands R ,R R ,R R ,R R ,R R ,R R ,D(X,B) R ,R R ,R R ,R R ,R R ,R D(B) R ,D(X,B) R ,I R ,R ,D(B) R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,R D(B) R ,R R ,R R ,R R ,D(X,B) R ,R R ,R R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,R R ,D(X,B) R ,D(X,B) R ,R R ,R R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R

R

R

R ,D(X,B) R ,R ,D(X,B) R ,R ,D(X,B) R ,R ,R R ,R ,R R ,R ,D(X,B) R ,R ,D(X,B) R ,R ,R R ,R ,R D (B ),I R ,D(X,B) R ,D(X,B) R ,R R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R ,D(X,B) R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R ,D(X,B) R ,I R ,D(X,B) R ,R D (L ,B ),D(L,B) R ,R R ,D(X,B) D(B)

Name Load Lengthened (SB/LB) Load Lengthened (SH/LH) Load (L) Load Rounded (EB/LB) Load Rounded (EH/LH) Load (S) Load Rounded (LB/SB) Load Rounded (LH/SH) Load (S) Load Rounded (EB/SB) Load Rounded (EH/SH) Load FPC Load Halfword Load Halfword Immediate Load Multiple Load Negative (LB) Load Negative (LH) Load Negative (SB) Load Negative (SH) Load Negative Load Negative (EB) Load Negative (EH) Load Positive (LB) Load Positive (LH) Load Positive (SB) Load Positive (SH) Load Positive Load PSW Load Positive (EB) Load Positive (EH) Load Load Real Address Load Rounded (EH/LH) Load Rounded (LH/SH) Load Reversed Load Reversed Load Reversed Load and Test (LB) Load and Test (LH) Load and Test (SB) Load and Test (SH) Load and Test Load and Test (EB) Load and Test (EH) Load Using Real Address Load Lengthened (LH/EH) Load Lengthened (LB/EB) Load Lengthened (LB/EB) Load Lengthened (LH/EH) Load Lengthened (SH/EH) Load Lengthened (SB/EB) Load Lengthened (SB/EB) Load Lengthened (SH/EH) Load (E) Load Zero (L) Load Zero (S) Load Zero (E) Multiply Multiply and Add (LH) Multiply and Add (LB) Multiply and Add (LB) Multiply and Add (LH) Multiply and Add (SH) Multiply and Add (SB) Multiply and Add (SB) Multiply and Add (SH) Monitor Call Multiply (LH) Multiply (LB) Multiply (LB) Multiply (SH/LH) Multiply (SB/LB) Multiply (SB/LB) Multiply (SH/LH) Multiply (LH) Multiply (SH/LH) Multiply (SH) Multiply (SB) Multiply (SB) Multiply (SH) Multiply (SH/LH) Multiply Halfword Multiply Halfword Immediate Multiply Logical Multiply Logical Multiply Decimal Multiply Multiply Single Modify Subchannel

Format RRE RRE RR RRE RR RX RRE RR RR RRE RRE S RX RI

RS

RRE RR RRE RR RR RRE RRE RRE RR RRE RR RR S RRE RRE RR RX RR RR RXE RXE RRE RRE RR RRE RR RR RRE RRE RRE RXE RXE RRE RRE RXE RXE RRE RRE RRE RRE RRE RRE RX RXF RXF RRF

RRF

RXF RXF RRF

RRF

SI RX RXE RRE RX RXE RRE RR RR RX RXE RXE RRE RRE RR RX RI

RXE RRE SS RR RX S

Op Code B304 B324 28 B345 25 78 B344 35 38 B346 B366 B29D 48 A78 98 B311 21 B301 31 11 B341 B361 B310 20 B300 30 10 82 B340 B360 18 B1 25 35 E31E E31F B91F B312 22 B302 32 12 B342 B362 B24B ED25 ED05 B305 B325 ED26 ED06 B306 B326 B365 B375 B374 B376 5C ED3E ED1E B31E B33E ED2E ED0E B30E B32E AF 6C ED1C B31C 7C ED0C B30C 3C 2C 7C ED37 ED17 B317 B337 3C 4C A7C E396 B996 FC 1C 71 B232

Class & Notes a a a a a a a

ac c ac c c ac ac ac c ac c c pn ac ac pc

ac c ac c c ac ac p a a a a a a a a a a a a HM a a HM HM a a HM a a a a

a a a a

pc

7

Machine Instructions by Mnemonic (Cont'd)

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Mnemonic MSD MSDB MSDBR MSDR MSE MSEB MSEBR MSER MSR MSTA MVC MVCDK MVCIN MVCK MVCL MVCLE MVCLU MVCP MVCS MVCSK MVI MVN MVO MVPG MVST MVZ MXBR MXD MXDB MXDBR MXDR MXR N NC NI NR O OC OI OR PACK PALB PC PCF PGIN PGOUT PKA PKU PLO PR PT PTLB RCHP RLL RP RRBE RSCH S SAC SACF

Name Multiply and Subtract (LH) Multiply and Subtract (LB) Multiply and Subtract (LB) Multiply and Subtract (LH) Multiply and Subtract (SH) Multiply and Subtract (SB) Multiply and Subtract (SB) Multiply and Subtract (SH) Multiply Single Modify Stacked State Move Move with Destination key Move Inverse Move with Key Move Long Move Long Extended Move Long Unicode Move to Primary Move to Secondary Move with Source Key Move Move Numerics Move with Offset Move Page Move String Move Zones Multiply (EB) Multiply (LH/EH) Multiply (LB/EB) Multiply (LB/EB) Multiply (LH/EH) Multiply (EH) And And And And Or Or Or Or Pack Purge ALB D(B) Program Call D(B) Program Call Fast R ,R Page In R ,R Page Out D (B ),D(L,B) Pack ASCII D (B ),D(L,B) Pack Unicode R ,D(B),R ,D (B ) Perform Locked Operation Program Return R ,R Program Transfer Purge TLB Reset Channel Path R ,R ,D(B) Rotate Left Single Logical D(B) Resume Program R ,R Reset Reference Bit Extended Resume Subchannel R ,D(X,B) Subtract D(B) Set Address Space Control D(B) Set Address Space Control Fast SAL Set Address Limit SAM24 Set Addressing Mode SAM31 Set Addressing Mode SAR R ,R Set Access SCHM Set Channel Monitor SCK D(B) Set Clock SCKC D(B) Set Clock Comparator SCKPF Set Clock Programmable Field SD R ,D(X,B) Subtract Normalized (LH) SDB R ,D(X,B) Subtract (LB) SDBR R ,R Subtract (LB) SDR R ,R Subtract Normalized (LH) SE R ,D(X,B) Subtract Normalized (SH) SEB R ,D(X,B) Subtract (SB) SEBR R ,R Subtract (SB) SER R ,R Subtract Normalized (SH) SFPC R

Set FPC SH R ,D(X,B) Subtract Halfword SIE D(B) Start Interpretive Execution SIGP R ,R ,D(B) Signal Processor SL R ,D(X,B) Subtract Logical SLA R ,D(B) Shift Left Single SLB R ,D(X,B) Subtract Logical with Borrow SLBR R ,R Subtract Logical with Borrow SLDA R ,D(B) Shift Left Double SLDL R ,D(B) Shift Left Double Logical SLL R ,D(B) Shift Left Single Logical SLR R ,R Subtract Logical

8

Operands R ,R ,D(X,B) R ,R ,D(X,B) R ,R ,R R ,R ,R R ,R ,D(X,B) R ,R ,D(X,B) R ,R ,R R ,R ,R R ,R R

D (L,B ),D(B) D (B ),D(B) D (L,B ),D(B) D (R ,B ),D(B),R R ,R R ,R ,D(B) R ,R ,D(B) D (R ,B ),D(B),R D (R ,B ),D(B),R D (B ),D(B) D (B ),I D (L,B ),D(B) D (L ,B ),D(L,B) R ,R R ,R D (L,B ),D(B) R ,R R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R ,D(X,B) D (L,B ),D(B) D (B ),I R ,R R ,D(X,B) D (L,B ),D(B) D (B ),I R R D (L ,B ),D(L,B)

ESA/390 Reference Summary

Format RXF RXF RRF

RRF

RXF RXF RRF

RRF

RRE RRE SS

SSE SS

SS RR RS

RSE SS SS SSE SI SS

SS RRE RRE SS

RRE RX RXE RRE RR RR RX SS

SI RR RX SS

SI RR SS RRE S S RRE RRE SS

SS

SS E RRE S S RSE S RRE S RX S S

Op Code ED3F ED1F B31F B33F ED2F ED0F B30F B32F B252 B247 D2 E50F E8 D9 0E A8 EB8E DA DB E50E 92 D1 F1 B254 B255 D3 B34C 67 ED07 B307 27 26 54 D4 94 14 56 D6 96 16 F2 B248 B218 B218 B22E B22F E9 E1 EE 0101 B228 B20D B23B EB1D B277 B22A B238 5B B219 B279

S E E RRE S S S E RX RXE RRE RR RX RXE RRE RR RRE RX S RS

RX RS

RXE RRE RS

RS

RS

RR

B237 010C 010D B24E B23C B204 B206 0107 6B ED1B B31B 2B 7B ED0B B30B 3B B384 4B B214 AE 5F 8B E399 B999 8F 8D 89 1F

Class & Notes HM a a HM HM a a HM

q qc ic c c qc qc q

qc c a a a c c c c c c c c p q q pc pc c qu q p pc qn pc pc c q q p

p pc p p c ac ac c c ac ac c a c ip pc c c c c c c

Machine Instructions by Mnemonic (Cont'd)

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Mnemonic SP SPKA SPM SPT SPX SQD SQDB SQDBR SQDR SQE SQEB SQEBR SQER SQXR SQXBR SR SRA SRDA SRDL SRL SRNM SRP SRST SSAR SSCH SSKE SSM ST STAM STAP STC STCK STCKC STCKE STCM STCPS STCRW STCTL STD STE STFL STFPC STH STIDP STM STNSM STOSM STPT STPX STRV STRVH STSI STSCH STURA SU SUR SVC SW SWR SXBR SXR TAM TAR TB TBDR TBEDR TCDB TCEB TCXB THDER THDR TM TMH TML TP TPI TPROT TR TRACE TRAP2 TRAP4 TRE TROO TROT TRT TRTO TRTT TS TSCH

Operands D (L ,B ),D(L,B) D(B) R

D(B) D(B) R ,D(X,B) R ,D(X,B) R ,R R ,R R ,D(X,B) R ,D(X,B) R ,R R ,R R ,R R ,R R ,R R ,D(B) R ,D(B) R ,D(B) R ,D(B) D(B) D (L ,B ),D(B),I R ,R R

D(B) R ,R D(B) R ,D(X,B) R ,R ,D(B) D(B) R ,D(X,B) D(B) D(B) D(B) R ,M ,D(B) D(B) D(B) R ,R ,D(B) R ,D(X,B) R ,D(X,B) D(B) D(B) R ,D(X,B) D(B) R ,R ,D(B) D (B ),I D (B ),I D(B) D(B) R ,D(X,B) R ,D(X,B) D(B) D(B) R ,R R ,D(X,B) R ,R I R ,D(X,B) R ,R R ,D R ,D R ,R R ,R R ,M ,R R ,M ,R R ,D(X,B) R ,D(X,B) R ,D(X,B) R ,R R ,R D (B ),I R ,I R ,I D (L ,B ) D(B) D (B ),D(B) D (L,B ),D(B) R ,R ,D(B) D(B) R ,R R ,R R ,R D (L,B ),D(B) R ,R R ,R D(B) D(B)

Name Subtract Decimal Set PSW Key from Address Set Program Mask Set CPU Timer Set Prefix Square Root (LH) Square Root (LB) Square Root (LB) Square Root (LH) Square Root (SH) Square Root (SB) Square Root (SB) Square Root (SH) Square Root (EH) Square Root (EB) Subtract Shift Right Single Shift Right Double Shift Right Double Logical Shift Right Single Logical Set Rounding Mode Shift and Round Decimal Search String Set Secondary ASN Start Subchannel Set Storage Key Extended Set System Mask Store Store Access Multiple Store CPU Address Store Character Store Clock Store Clock Comparator Store Clock Extended Store Characters under Mask Store Channel Path Status Store Channel Report Word Store Control Store (L) Store (S) Store Facility List Store FPC Store Halfword Store CPU ID Store Multiple Store Then And System Mask Store Then Or System Mask Store CPU Timer Store Prefix Store Reversed Store Reversed Store System Information Store Subchannel Store Using Real Address Subtract Unnormalized (SH) Subtract Unnormalized (SH) Supervisor Call Subtract Unnormalized (LH) Subtract Unnormalized (LH) Subtract (EB) Subtract Normalized (EH) Test Addressing Mode Test Access Test Block Convert HFP to BFP (LH/LB) Convert HFP to BFP (LH/SB) Test Data Class (LB) Test Data Class (SB) Test Data Class (EB) Convert BFP to HFP (SB/LH) Convert BFP to HFP (LB/LH) Test under Mask Test under Mask High Test under Mask Low Test Decimal Test Pending Interruption Test Protection Translate Trace Trap Trap Translate Extended Translate One to One Translate One to Two Translate and Test Translate Two to One Translate Two to Two Test and Set Test Subchannel

Format SS S RR S S RXE RXE RRE RRE RXE RXE RRE RRE RRE RRE RR RS

RS

RS

RS

S SS RRE RRE S RRE S RX RS

S RX S S S RS S S RS

RX RX S S RX S RS

SI SI S S RXE RXE S S RRE RX RR I RX RR RRE RR E RRE RRE RRF RRF RXE RXE RXE RRE RRE SI RI

RI

RSL S SSE SS

RS

E S RRE RRE RRE SS

RRE RRE S S

Op Code FB B20A 04 B208 B210 ED35 ED15 B315 B244 ED34 ED14 B314 B245 B336 B316 1B 8A 8E 8C 88 B299 F0 B25E B225 B233 B22B 80 50 9B B212 42 B205 B207 B278 BE B23A B239 B6 60 70 B2B1 B29C 40 B202 90 AC AD B209 B211 E33E E33F B27D B234 B246 7F 3F 0A 6F 2F B34B 37 010B B24C B22C B351 B350 ED11 ED10 ED12 B358 B359 91 A70 A71 EBC0 B236 E501 DC 99 01FF B2FF B2A5 B993 B992 DD B991 B990 93 B235

Class & Notes c q n p p a a a a a a a a c c c a c c pc p p p c p c p pc p p a p p p p p pc pc p c c c c ac c c c ipc ac ac ac ac ac ac ac c c c c E2 pc pc p c c c c c c c pc

9

Machine Instructions by Mnemonic (Cont'd)

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Mnemonic UNPK UNPKA UNPKU UPT VA VACD VACDR VACE VACER VACRS VACSV VAD VADQ VADR VADS VAE VAEQ VAER VAES VAQ VAR VAS VC VCD VCDQ VCDR VCDS VCE VCEQ VCER VCES VCOVM VCQ VCR VCS VCVM VCZVM VDD VDDQ VDDR VDDS VDE VDEQ VDER VDES VL VLBIX VLCDR VLCER VLCR VLCVM VLD VLDQ VLDR VLE VLEL VLELD VLELE VLEQ VLER VLH VLI VLID VLIE VLINT VLM VLMD VLMDQ VLMDR VLME VLMEQ VLMER VLMQ VLMR VLNDR VLNER VLNR VLPDR VLPER VLPR VLQ VLR VLVCA VLVCU VLVM VLVXA VLY VLYD VLYE

10

Operands D (L ,B ),D(L,B) D (L ,B ),D(B) D (L ,B ),D(B)

Name Unpack Unpack ASCII Unpack Unicode Update Tree VR ,VR ,RS(RT) Add VR ,RS(RT) Accumulate (LH) VR ,VR Accumulate (LH) VR ,RS(RT) Accumulate (SH/LH) VR ,VR Accumulate (SH/LH) D(B) Restore VAC D(B) Save VAC VR ,VR ,RS(RT) Add (LH) VR ,FR ,VR Add (LH) VR ,VR ,VR Add (LH) VR ,FR ,RS(RT) Add (LH) VR ,VR ,RS(RT) Add (SH) VR ,FR ,VR Add (SH) VR ,VR ,VR Add (SH) VR ,FR ,RS(RT) Add (SH) VR ,GR ,VR Add VR ,VR ,VR Add VR ,GR ,RS(RT) Add M ,VR ,RS(RT) Compare M ,VR ,RS(RT) Compare (LH) M ,FR ,VR Compare (LH) M ,VR ,VR Compare (LH) M ,FR ,RS(RT) Compare (LH) M ,VR ,RS(RT) Compare (SH) M ,FR ,VR Compare (SH) M ,VR ,VR Compare (SH) M ,FR ,RS(RT) Compare (SH) GR

Count Ones in VMR M ,GR ,VR Compare M ,VR ,VR Compare M ,GR ,RS(RT) Compare Complement VMR GR

Count Left Zeros in VMR VR ,VR ,RS(RT) Divide (LH) VR ,FR ,VR Divide (LH) VR ,VR ,VR Divide (LH) VR ,FR ,RS(RT) Divide (LH) VR ,VR ,RS(RT) Divide (SH) VR ,FR ,VR Divide (SH) VR ,VR ,VR Divide (SH) VR ,FR ,RS(RT) Divide (SH) VR ,RS,(RT) Load VR ,GR ,D(B) Load Bit Index VR ,VR Load Complement (LH) VR ,VR Load Complement (SH) VR ,VR Load Complement RS Load VMR Complement VR ,RS(RT) Load (LH) VR ,FR Load (LH) VR ,VR Load (LH) VR ,RS(RT) Load (SH) VR ,GR ,GR Load Element VR ,FR ,GR Load Element (LH) VR ,FR ,GR Load Element (SH) VR ,FR Load (SH) VR ,FR Load (SH) VR ,RS(RT) Load Halfword VR ,VR ,D(B) Load Indirect VR ,VR ,D(B) Load Indirect (LH) VR ,VR ,D(B) Load Indirect (SH) VR ,RS(RT) Load Integer Vector VR ,RS(RT) Load Matched VR ,RS(RT) Load Matched (LH) VR ,FR Load Matched (LH) VR ,VR Load Matched (LH) VR ,RS(RT) Load Matched (SH) VR ,FR Load Matched (SH) VR ,VR Load Matched (SH) VR ,GR Load Matched VR ,VR Load Matched VR ,VR Load Negative (LH) VR ,VR Load Negative (SH) VR ,VR Load Negative VR ,VR Load Positive (LH) VR ,VR Load Positive (SH) VR ,VR Load Positive VR ,GR Load VR ,VR Load D(B) Load VCT from Address GR

Load VCT and Update RS Load VMR D(B) Load VIX from Address VR ,RS(RT) Load Expanded VR ,RS(RT) Load Expanded (LH) VR ,RS(RT) Load Expanded (SH)

ESA/390 Reference Summary

Format SS SS

SS

E VST VST VV VST VV S S VST QV VV QST VST QV VV QST QV VV QST VST VST QV VV QST VST QV VV QST RRE QV VV QST RRE RRE VST QV VV QST VST QV VV QST VST RSE VV VV VV VS VST QV VV VST VR VR VR QV VV VST RSE RSE RSE VST VST VST QV VV VST QV VV QV VV VV VV VV VV VV VV QV VV S RRE VS S VST VST VST

Op Code F3 EA E2 0102 A420 A417 A517 A407 A507 A6CB A6CA A410 A590 A510 A490 A400 A580 A500 A480 A5A0 A520 A4A0 A428 A418 A598 A518 A498 A408 A588 A508 A488 A643 A5A8 A528 A4A8 A641 A642 A413 A593 A513 A493 A403 A583 A503 A483 A409 E428 A552 A542 A562 A681 A419 A599 A519 A409 A628 A618 A608 A589 A509 A429 E400 E410 E400 A42A A40A A41A A59A A51A A40A A58A A50A A5AA A50A A551 A541 A561 A550 A540 A560 A5A9 A509 A6C4 A645 A680 A6C7 A40B A41B A40B

Class & Notes c c ic IM IM IM IM IM NO p NO p IM IM IM IM IM IM IM IM IM IM IM IC IC IC IC IC IC IC IC IC NC c IC IC IC NC NC c IM IM IM IM IM IM IM IM IC IG c IM IM IM NC IC IC IC IC N1 N1 N1 IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IC IM IM IM IM IM IM IC IC N0 c N0 c N0 N0 c IC IC IC

Machine Instructions by Mnemonic (Cont'd)

Mnemonic VLZDR VLZER VLZR VM VMAD VMADQ VMADS VMAE VMAEQ VMAES VMCD VMCDR VMCE

Operands VR

VR

VR

VR ,VR ,RS(RT) VR ,VR ,RS(RT) VR ,FR ,VR VR ,FR ,RS(RT) VR ,VR ,RS(RT) VR ,FR ,VR VR ,FR ,RS(RT) VR ,VR ,RS(RT) VR ,VR ,VR VR ,VR ,RS(RT)

VMCER VR ,VR ,VR VMD VMDQ VMDR VMDS VME VMEQ VMER VMES VMNSD VMNSE VMQ VMR VMRRS VMRSV VMS VMSD VMSDQ VMSDS VMSE VMSEQ VMSES VMXAD VMXAE VMXSD VMXSE VN VNQ VNR VNS VNVM VO VOQ VOR VOS VOVM VRCL VRRS VRSV VRSVC VS VSD VSDQ VSDR VSDS VSE VSEQ VSER VSES VSLL VSPSD VSQ VSQD VSQDR VSQE VSQER VSR VSRL VSRRS VSRSV VSS VST VSTD VSTE VSTH VSTI VSTID VSTIE VSTK VSTKD VSTKE VSTM VSTMD VSTME

VR ,VR ,RS(RT) VR ,FR ,VR VR ,VR ,VR VR ,FR ,RS(RT) VR ,VR ,RS(RT) VR ,FR ,VR VR ,VR ,VR VR ,FR ,RS(RT) VR ,FR ,GR VR ,FR ,GR VR ,GR ,VR VR ,VR ,VR D(B) D(B) VR ,GR ,RS(RT) VR ,VR ,RS(RT) VR ,FR ,VR VR ,FR ,RS(RT) VR ,VR ,RS(RT) VR ,FR ,VR VR ,FR ,RS(RT) VR ,FR ,GR VR ,FR ,GR VR ,FR ,GR VR ,FR ,GR VR ,VR ,RS(RT) VR ,GR ,VR VR ,VR ,VR VR ,GR ,RS(RT) RS VR ,VR ,RS(RT) VR ,VR ,VR VR ,VR ,VR VR ,GR ,RS(RT) RS D(B) GR

GR

GR

VR ,VR ,RS(RT) VR ,VR ,RS(RT) VR ,FR ,VR VR ,VR ,VR VR ,FR ,RS(RT) VR ,VR ,RS(RT) VR ,FR ,VR VR ,VR ,VR VR ,FR ,RS(RT) VR ,VR ,D(B) VR ,FR VR ,GR ,VR VR ,RS(RT) VR ,VR VR ,RS(RT) VR ,VR VR ,VR ,VR VR ,VR ,D(B) D(B) D(B) VR ,GR ,RS(RT) VR ,RS(RT) VR ,RS(RT) VR ,RS(RT) VR ,RS(RT) VR ,VR D(B) VR ,VR D(B) VR ,VR D(B) VR ,RS(RT) VR ,RS(RT) VR ,RS(RT) VR ,RS(RT) VR ,RS(RT) VR ,RS(RT)

Name Load Zero (LH) Load Zero (SH) Load Zero Multiply Multiply and Add (LH) Multiply and Add (LH) Multiply and Add (LH) Multiply and Add (SH/LH) Multiply and Add (SH/LH) Multiply and Add (SH/LH) Multiply and Accumulate (LH) Multiply and Accumulate (LH) Multiply and Accumulate (SH/LH) Multiply and Accumulate (SH/LH) Multiply (LH) Multiply (LH) Multiply (LH) Multiply (LH) Multiply (SH/LH) Multiply (SH/LH) Multiply (SH/LH) Multiply (SH/LH) Minimum Signed (LH) Minimum Signed (SH) Multiply Multiply Restore VMR Save VMR Multiply Multiply and Subtract (LH) Multiply and Subtract (LH) Multiply and Subtract (LH) Multiply and Subtract (SH/LH) Multiply and Subtract (SH/LH) Multiply and Subtract (SH/LH) Maximum Absolute (LH) Maximum Absolute (SH) Maximum Signed (LH) Maximum Signed (SH) And And And And And to VMR Or Or Or Or Or to VMR Clear VR Restore VR Save VR Save Changed VR Subtract Subtract (LH) Subtract (LH) Subtract (LH) Subtract (LH) Subtract (SH) Subtract (SH) Subtract (SH) Subtract (SH) Shift Left Single Logical Sum Partial Sums (LH) Subtract Square Root (LH) Square Root (LH) Square Root (SH) Square Root (SH) Subtract Shift Right Single Logical Restore VSR Save VSR Subtract Store Store (LH) Store (SH) Store Halword Store Indirect Store Indirect (LH) Store Indirect (SH) Store Compressed Store Compressed (LH) Store Compressed (SH) Store Matched Store Matched (LH) Store Matched (SH)

Format VV VV VV VST VST QV QST VST QV QST VST VV VST

Op Code A51B A50B A50B A422 A414 A594 A494 A404 A584 A484 A416 A516 A406

Class & Notes IC IC IC IM IM IM IM IM IM IM IM IM IM

VV

A506

IM

VST QV VV QST VST QV VV QST VR VR QV VV S S QST VST QV QST VST QV QST VR VR VR VR VST QV VV QST VS VST QV VV QST VS S RRE RRE RRE VST VST QV VV QST VST QV VV QST RSE VR QV VST VV VST VV VV RSE S S QST VST VST VST VST RSE RSE RSE VST VST VST VST VST VST

A412 A592 A512 A492 A402 A582 A502 A482 A611 A601 A5A2 A522 A6C3 A6C1 A4A2 A415 A595 A495 A405 A585 A485 A612 A602 A610 A600 A424 A5A4 A524 A4A4 A684 A425 A5A5 A525 A4A5 A685 A6C5 A648 A64A A649 A421 A411 A591 A511 A491 A401 A581 A501 A481 E425 A61A A5A1 A453 A553 A443 A543 A521 E424 A6C2 A6C0 A4A1 A40D A41D A40D A42D E401 E411 E401 A40F A41F A40F A40E A41E A40E

IM IM IM IM IM IM IM IM IM IM IM IM NZ NZ IM IM IM IM IM IM IM IM IM IM IM IM IM IM IM NC IM IM IM IM NC IZ IZ xc IZ c IZ pc IM IM IM IM IM IM IM IM IM IM IP IM IM IM IM IM IM IM IZ x N0 x IM IC IC IC IC IC IC IC IC IC IC IC IC IC

11

Machine Instructions by Mnemonic (Cont'd)

| |

| | |

Mnemonic VSTVM VSTVP VSVMM VTAD VTAE VTSD VTSE VTVM VX VXEL VXELD VXELE VXQ VXR VXS VXVC VXVM VXVMM VZPSD X XC XI XR XSCH ZAP ---

Operands RS D(B) D(B) VR ,VR ,RS(RT) VR ,VR ,RS(RT) VR ,VR ,RS(RT) VR ,VR ,RS(RT)

Name Store VMR Store Vector Parameters Set Vector Mask Mode Multiply then ADD (LH) Multiply then ADD (SH/LH) Multiply then Subtract (LH) Multiply then Subtract (SH/LH) Test VMR VR ,VR ,RS(RT) Exclusive Or VR ,GR ,GR Extract Element VR ,FR ,GR Extract Element (LH) VR ,FR ,GR Extract Element (SH) VR ,GR ,VR Exclusive Or VR ,VR ,VR Exclusive Or VR ,GR ,RS(RT) Exclusive Or GR

Extract VCT RS Exclusive Or to VMR GR

Extract Vector Mask Mode VR

Zero Partial Sums (LH) R ,D(X,B) Exclusive Or D (L,B ),D(B) Exclusive Or D (B ),I Exclusive Or R ,R Exclusive Or Cancel Subchannel D (L ,B ),D(L,B) Zero and Add Model-dependent Diagnose

Floating-Point Operand Lengths and Types: (x) Source and result (x/y) Source (x) and result (y) E Extended (binary or hex) EB Extended binary EH Extended hex L Long (binary or hex) LB Long binary LH Long hex S Short (binary or hex) SB Short binary SH Short hex 32 32-bit integer

Format VS S S VST VST VST VST RRE VST VR VR VR QV VV QST RRE VS RRE VR RX SS

SI RR S SS --

Op Code A682 A6C8 A6C6 A454 A444 A455 A445 A640 A426 A629 A619 A609 A5A6 A526 A4A6 A644 A686 A646 A61B 57 D7 97 17 B276 F8 83

Notes: a c i n p q u

Additional-floating-point instruction Condition code set Interruptible instruction New condition code loaded Privileged instruction Semiprivileged instruction Condition code is unpredictable or may be set Hexadecimal multiply-and-add/subtract facility Message-security assist facility

HM MS

Class (for instructions subject to vector-control bit, CR 0 bit 14): IC Interruptible; (VCT – VIX) elements processed IG Interruptible; either (bit count in a general register) elements or (section-size – VIX) elements processed, whichever is fewer IM Interruptible; (VCT – VIX) elements processed, vector-mask mode IP Interruptible; (partial-sum-number – VIX) elements processed IZ Interruptible; (section-size) elements processed NC Not interruptible; (VCT) elements processed NZ Not interruptible; (section-size) elements processed N0 Not interruptible; no elements processed (VSR/VAC housekeeping) N1 Not interruptible; one element processed

Machine Instructions by Operation Code Op Code 0101 0102 0107 010B 010C 010D 01FF 04 05 06 07 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17

12

Mnemonic PR UPT SCKPF TAM SAM24 SAM31 TRAP2 SPM BALR BCTR BCR SVC BSM BASSM BASR MVCL CLCL LPR LNR LTR LCR NR CLR OR XR

Op Code 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 25 26 27 28 29 2A 2B 2C 2D 2E 2F

Class & Notes NC N0 N0 IM IM IM IM NC c IM N1 N1 N1 IM IM IM N0 NC N0 IP c c c c pc c pu

Mnemonic LR CR AR SR MR DR ALR SLR LPDR LNDR LTDR LCDR HDR LDXR LRDR MXR MXDR LDR CDR ADR SDR MDR DDR AWR SWR

ESA/390 Reference Summary

Op Code 30 31 32 33 34 35 35 36 37 38 39 3A 3B 3C 3C 3D 3E 3F 40 41 42 43 44 45 46

Mnemonic LPER LNER LTER LCER HER LEDR LRER AXR SXR LER CER AER SER MDER MER DER AUR SUR STH LA STC IC EX BAL BCT

Machine Instructions by Operation Code (Cont'd)

Op Code 47 48 49 4A 4B 4C 4D 4E 4F 50 51 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 67 68 69 6A 6B 6C 6D 6E 6F 70 71 78 79 7A 7B 7C 7C 7D 7E 7F 80 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B A400 A401 A402 A403 A404 A405 A406 A407 A408 A409 A409 A40A A40A A40B A40B A40D A40D A40E A40E A40F A40F A410 A411 A412 A413 A414 A415 A416 A417 A418 A419 A41A A41B A41D A41E A41F A420 A421

Mnemonic BC LH CH AH SH MH BAS CVD CVB ST LAE N CL O X L C A S M D AL SL STD MXD LD CD AD SD MD DD AW SW STE MS LE CE AE SE MDE ME DE AU SU SSM LPSW Diagnose BRXH BRXLE BXH BXLE SRL SLL SRA SLA SRDL SLDL SRDA SLDA STM TM MVI TS NI CLI OI XI LM TRACE LAM STAM VAE VSE VME VDE VMAE VMSE VMCE VACE VCE VL VLE VLM VLME VLY VLYE VST VSTE VSTM VSTME VSTK VSTKE VAD VSD VMD VDD VMAD VMSD VMCD VACD VCD VLD VLMD VLYD VSTD VSTMD VSTKD VA VS

Op Code A422 A424 A425 A426 A428 A429 A42A A42D A443 A444 A445 A453 A454 A455 A480 A481 A482 A483 A484 A485 A488 A490 A491 A492 A493 A494 A495 A498 A4A0 A4A1 A4A2 A4A4 A4A5 A4A6 A4A8 A500 A501 A502 A503 A506 A507 A508 A509 A509 A50A A50A A50B A50B A510 A511 A512 A513 A516 A517 A518 A519 A51A A51B A520 A521 A522 A524 A525 A526 A528 A540 A541 A542 A543 A550 A551 A552 A553 A560 A561 A562 A580 A581 A582 A583 A584 A585 A588 A589 A58A A590 A591 A592 A593 A594 A595 A598 A599 A59A A5A0 A5A1 A5A2 A5A4 A5A5 A5A6 A5A8 A5A9 A5AA A600 A601 A602 A608 A609 A610

Mnemonic VM VN VO VX VC VLH VLINT VSTH VSQE VTAE VTSE VSQD VTAD VTSD VAES VSES VMES VDES VMAES VMSES VCES VADS VSDS VMDS VDDS VMADS VMSDS VCDS VAS VSS VMS VNS VOS VXS VCS VAER VSER VMER VDER VMCER VACER VCER VLER VLR VLMER VLMR VLZER VLZR VADR VSDR VMDR VDDR VMCDR VACDR VCDR VLDR VLMDR VLZDR VAR VSR VMR VNR VOR VXR VCR VLPER VLNER VLCER VSQER VLPDR VLNDR VLCDR VSQDR VLPR VLNR VLCR VAFQ VSEQ VMEQ VDEQ VMAEQ VMSEQ VCEQ VLEQ VLMEQ VADQ VSDQ VMDQ VDDQ VMADQ VMSDQ VCDQ VLDQ VLMDQ VAQ VSQ VMQ VNQ VOQ VXQ VCQ VLQ VLMQ VMXSE VMNSE VMXAE VLELE VXELE VMXSD

Op Code A611 A612 A618 A619 A61A A61B A628 A629 A640 A641 A642 A643 A644 A645 A646 A648 A649 A64A A680 A681 A682 A684 A685 A686 A6C0 A6C1 A6C2 A6C3 A6C4 A6C5 A6C6 A6C7 A6C8 A6CA A6CB A70 A71 A74 A75 A76 A78 A7A A7C A7E A8 A9 AC AD AE AF B1 B202 B204 B205 B206 B207 B208 B209 B20A B20B B20D B210 B211 B212 B214 B218 B218 B219 B21A B221 B222 B223 B224 B225 B226 B227 B228 B229 B22A B22B B22C B22D B22E B22F B230 B231 B232 B233 B234 B235 B236 B237 B238 B239 B23A B23B B23C B240 B241 B244 B245 B246 B247 B248 B249 B24A B24B B24C B24D

Mnemonic VMNSD VMXAD VLELD VXELD VSPSD VZPSD VLEL VXEL VTVM VCVM VCZVM VCOVM VXVC VLVCU VXVMM VRRS VRSVC VRSV VLVM VLCVM VSTVM VNVM VOVM VXVM VSRSV VMRSV VSRRS VMRRS VLVCA VRCL VSVMM VLVXA VSTVP VACSV VACRS TMH TML BRC BRAS BRCT LHI AHI MHI CHI MVCLE CLCLE STNSM STOSM SIGP MC LRA STIDP SCK STCK SCKC STCKC SPT STPT SPKA IPK PTLB SPX STPX STAP SIE PC PCF SAC CFC IPTE IPM IVSK IAC SSAR EPAR ESAR PT ISKE RRBE SSKE TB DXR PGIN PGOUT CSCH HSCH MSCH SSCH STSCH TSCH TPI SAL RSCH STCRW STCPS RCHP SCHM BAKR CKSM SQDR SQER STURA MSTA PALB EREG ESTA LURA TAR CPYA

13

Machine Instructions by Operation Code (Cont'd)

| | | |

Op Code B24E B24F B250 B252 B254 B255 B257 B258 B25A B25D B25E B263 B276 B277 B278 B279 B27D B299 B29C B29D B2A5 B2A6 B2A7 B2B1 B2FF B300 B301 B302 B303 B304 B305 B306 B307 B308 B309 B30A B30B B30C B30D B30E B30F B310 B311 B312 B313 B314 B315 B316 B317 B318 B319 B31A B31B B31C B31D B31E B31F B324 B325 B326 B32E B32F B336 B337 B33E B33F B340 B341 B342 B343 B344 B345 B346 B347 B348 B349 B34A B34B B34C B34D B350 B351 B353 B357 B358 B359 B35B B35F B360 B361 B362 B363 B365 B366 B367 B369 B374 B375 B376 B377 B37F B384 B38C B394 B395 B396 B398 B399 B39A

14

Mnemonic SAR EAR CSP MSR MVPG MVST CUSE BSG BSA CLST SRST CMPSC XSCH RP STCKE SACF STSI SRNM STFPC LFPC TRE CUUTF CUTFU STFL TRAP4 LPEBR LNEBR LTEBR LCEBR LDEBR LXDBR LXEBR MXDBR KEBR CEBR AEBR SEBR MDEBR DEBR MAEBR MSEBR LPDBR LNDBR LTDBR LCDBR SQEBR SQDBR SQXBR MEEBR KDBR CDBR ADBR SDBR MDBR DDBR MADBR MSDBR LDER LXDR LXER MAER MSER SQXR MEER MADR MSDR LPXBR LNXBR LTXBR LCXBR LEDBR LDXBR LEXBR FIXBR KXBR CXBR AXBR SXBR MXBR DXBR TBEDR TBDR DIEBR FIEBR THDER THDR DIDBR FIDBR LPXR LNXR LTXR LCXR LXR LEXR FIXR CXR LZER LZDR LZXR FIER FIDR SFPC EFPC CEFBR CDFBR CXFBR CFEBR CFDBR CFXBR

| | | | |

| |

Op Code B3B4 B3B5 B3B6 B3B8 B3B9 B3BA B6 B7 B91E B91F B92E B92F B93E B93F B98D B990 B991 B992 B993 B996 B997 B998 B999 BA BB BD BE BF C00 C04 C05 D1 D2 D3 D4 D5 D6 D7 D9 DA DB DC DD DE DF E1 E2 E31E E31F E33E E33F E396 E397 E398 E399 E400 E400 E401 E401 E410 E411 E424 E425 E428 E500 E501 E50E E50F E8 E9 EA EB1D EB8E EB8F EBC0 ED04 ED05 ED06 ED07 ED08 ED09 ED0A ED0B ED0C ED0D ED0E ED0F ED10 ED11 ED12 ED14 ED15 ED17 ED18 ED19 ED1A ED1B ED1C ED1D ED1E ED1F ED24 ED25 ED26 ED2E ED2F ED34 ED35 ED37

Mnemonic CEFR CDFR CXFR CFER CFDR CFXR STCTL LCTL KMAC LRVR KM KMC KIMD KLMD EPSW TRTT TRTO TROT TROO MLR DLR ALCR SLBR CS CDS CLM STCM ICM LARL BRCL BRASL MVN MVC MVZ NC CLC OC XC MVCK MVCP MVCS TR TRT ED EDMK PKU UNPKU LRV LRVH STRV STRVH ML DL ALC SLB VLI VLIE VSTI VSTIE VLID VSTID VSRL VSLL VLBIX LASP TPROT MVCSK MVCDK MVCIN PKA UNPKA RLL MVCLU CLCLU TP LDEB LXDB LXEB MXDB KEB CEB AEB SEB MDEB DEB MAEB MSEB TCEB TCDB TCXB SQEB SQDB MEEB KDB CDB ADB SDB MDB DDB MADB MSDB LDE LXD LXE MAE MSE SQE SQD MEE

ESA/390 Reference Summary

| |

Op Code ED3E ED3F EE F0 F1 F2 F3 F8 F9 FA FB FC FD

Mnemonic MAD MSD PLO SRP MVO PACK UNPK ZAP CP AP SP MP DP

Condition Codes Condition Code → Mask Bit Value → General Instructions Add Add Halfword Add Halfword Immediate Add Logical Add Logical with Carry And Checksum

| | | |

Cipher Message Cipher Message with Chaining Compare

1 4

2 2

Zero Zero Zero

< Zero < Zero < Zero

> Zero > Zero > Zero

Overflow Overflow Overflow

Zero, no carry Zero, no carry Zero Checksum complete

Not zero, no carry Not zero, no carry Not zero ----

Zero, carry Zero, carry -------

Normal completion Normal completion Equal

----

----

----

----

First op low First op low and ctl = 0, or first op high and ctl = 1 Not equal Not equal

First op high First op high and ctl = 0, or first op low and ctl = 1 -------

Not zero, carry Not zero, carry ---CPU-determined completion Partial completion Partial completion ----

First low First low First low First low

First high First high First high First high

Compare and Form Codeword

Equal

Compare and Swap Compare Double and Swap Compare Halfword

Equal Equal

Compare Halfword Immediate Compare Logical

Equal

Compare Logical Characters under Mask Compare Logical Long Compare Logical Long Extended

Equal, or Mask is zero Equal

Compare Logical Long Unicode

Equal

----

----------

op

----

op

----

op

----

First op low First op low

First op high First op high

----

Equal

First op low

First op high

Compare Logical String

Equal

First op low

First op high

Compare until Substring Equal

Equal substring Second op end

Last bytes equal First op end, not second op end ----

Last bytes unequal ----

----

----

----

----

First op full

----

Equal

Equal

op

3 1

op

Compression Call

| | | | | |

0 8

op op op

Compute Intermed. Message Digest Compute Last Message Digest Compute Message Authen. Code Convert Unicode to UTF-8

Normal completion Normal completion Normal completion Data processed

----

Convert UTF-8 to Unicode

Data processed

First op full

----

Exclusive Or

Zero

Not zero

----

CPU-determined completion CPU-determined completion CPU-determined completion CPU-determined completion CPU-determined completion Partial completion Partial completion Partial completion CPU-determined completion CPU-determined completion ----

15

Condition Codes (Cont'd)

Condition Code → Mask Bit Value → Insert Characters under Mask

0 8 All zero, or mask is zero

1 4 Leftmost bit = 1

Load and Test Load Complement Load Negative Load Positive Move Long

Zero Zero Zero Zero Operand lengths equal Operand lengths equal Operand lengths equal Data moved

< Zero < Zero < Zero ---First op shorter

2 2 Not zero, but with leftmost bit = 0 > Zero > Zero ---> Zero First op longer

First op shorter

First op longer

First op shorter

First op longer

First op invalid, both valid in ES, locked, or ES error Second op moved

Second op invalid

Move Long Extended Move Long Unicode

Move Page

----

---Overflow ---Overflow Overlap

CPU-determined completion CPU-determined completion ----

Move String

----

Or Perform Locked Operation (test bit zero)

Zero Equal

Not zero First op not equal

Perform Locked Operation (test bit one) Search String

Code valid

----

---First op equal, third op not equal ----

----

Character found

Character not found

Set Program Mask Shift Left Double Shift Left Single Shift Right Double Shift Right Single Store Clock

See note Zero Zero Zero Zero Set state

See note < Zero < Zero < Zero < Zero Not-set state

See note > Zero > Zero > Zero > Zero Error state

Store Clock

Set state

Not-set state

Error state

Subtract Subtract Halfword Subtract Logical

Zero Zero ----

Subtract Logical with Borrow Test Addressing Mode Test and Set

Zero, borrow 24-bit mode Leftmost bit zero All zeros, or mask is zero All zeros or mask is zero

< Zero < Zero Not zero, borrow Not zero, borrow 31-bit mode Leftmost bit one Mixed 0's and 1's

> Zero > Zero Zero, no borrow Zero, no borrow ----

CPU-determined completion See note Overflow Overflow ------Stopped state or not operational Stopped state or not operational Overflow Overflow Not zero, no borrow Not zero, no borrow ----

----

----

---

All ones

Mixed 0's and 1's and leftmost bit zero Mixed 0's and 1's and leftmost bit zero Not zero, scan incomplete

Mixed 0's and 1's and leftmost bit one Mixed 0's and 1's and leftmost bit one Not zero, scan complete

All ones

Test under Mask

Test under Mask High

Test under Mask Low

All zeros or mask is zero

Translate and Test

All zeros

16

ESA/390 Reference Summary

----

3 1

CPU-determined completion -------

Code invalid

All ones

----

Condition Codes (Cont'd)

Condition Code → Mask Bit Value → Translate Extended

Translate One to One, One to Two, Two to One, Two to Two Unpack ASCII

Character not found

1 4 First op byte equal test byte Character found

Sign plus

Sign minus

----

Unpack Unicode

Sign plus

Sign minus

----

Update Tree

Compare equal at current node on path

Path complete, no nodes compared equal

----

Zero Equal

< Zero First op low < Zero < Zero < Zero

> Zero First op high > Zero > Zero > Zero

Overflow ----

< Zero Sign invalid

> Zero Digit invalid

Zero and Add

Zero Digits and sign valid Zero

< Zero

> Zero

Overflow Sign and digit invalid Overflow

Floating-Point Instructions Add Add Normalized Add Unnormalized Compare (BFP)

Zero Zero Zero Equal

Compare (HFP)

Equal

Compare and Signal Convert BFP to HFP Convert HFP to BFP Convert to Fixed

Equal Zero

< Zero < Zero < Zero First op low First op low First op low < Zero

> Zero > Zero > Zero First op high First op high First op high > Zero

Zero

< Zero

> Zero

Zero

< Zero

> Zero

Divide to Integer

Remainder complete, quotient normal

Remainder incomplete, quotient normal

Load and Test (BFP) Load and Test (HFP) Load Complement (BFP) Load Complement (HFP) Load Negative (BFP) Load Negative (HFP) Load Positive (BFP) Load Positive (HFP) Subtract

Zero

Remainder complete, quotient overflow or NaN < Zero

> Zero

Special case Special case Special case Remainder incomplete, quotient overflow or NaN NaN

Zero

< Zero

> Zero

----

Zero

< Zero

> Zero

NaN

Zero

< Zero

> Zero

----

Zero

< Zero

----

NaN

Zero

< Zero

----

----

Zero

----

> Zero

NaN

Zero

----

> Zero

----

Zero

< Zero

> Zero

NaN

Decimal Instructions Add Decimal Compare Decimal Edit Edit and Mark Shift and Round Decimal Subtract Decimal Test Decimal

0 8 Data processed

Zero Zero Zero

2 2 ----

----

3 1 CPU-determined completion CPU determinded completion Sign invalid Sign invalid Path not complete and compared register negative

------Overflow

NaN ------Unordered ---Unordered

17

Condition Codes (Cont'd)

Condition Code → Mask Bit Value → Subtract Normalized Subtract Unnormalized Test Data Class

Zero

1 4 < Zero

2 2 > Zero

----

Zero

< Zero

> Zero

----

Zero (no match)

One (match)

----

----

Active bits all zeros Active bits all zeros VCT = 0, bit count = 0

Active bits 0's and 1's Active bits 0's and 1's VCT = 0, bit count < 0

----

Load VCT and Update

VCT = 0, result = 0

VCT = 0, result < 0

Active bits all ones Active bits all ones VCT > 0, bit count ≤0 VCT > 0, result = 0

Load VCT from Address

VCT = 0, addr = 0

VCT = 0, addr < 0

Load VIX from Address

VIX = 0 and eff addr = 0 VR pair 14 examined and not restores

Vector Instructions Count Left Zeros in VMR Count Ones in VMR Load Bit Index

0 8

Save Changed VR

VR pair 14 examined and not saved

Save VR

VR pair 14 examined and not saved

Test VMR

Active bits all zeros

VIX = 0 and eff addr < 0 VR pair Other than 14 examined and not restored VR pair other than 14 examined and not saved VR pair other than 14 examined and not saved Active bits 0's and 1's

Equal See note Branch state entry

Restore VR

Control Instructions Compare and Swap and Purge Diagnose Extract Stacked State

Insert Address Space Control

VCT = section size, bit count > 0 VCT = section size, result > 0 VCT = section size, addr > section size VIX > 0 and < VCT VR pair 14 restored

VR pair other than 14 saved

VR pair 14 saved

VR pair other than 14 saved

----

Active bits all ones

Not equal

----

----

See note Program call state entry Secondaryspace mode Primary not available

See note ----

See note ----

Homespace mode Spaceswitch event

Load PSW Load Real Address

See note Translation available

See note Segmenttable entry invalid

Move to Primary

Length ≤ 256

----

----

18

VCT > 0, addr > 0, addr ≤ section size VIX > 0 and ≥ VCT VR pair other than 14 restored

VR pair 14 saved

Accessregister mode Secondary not authorized or not available See note Pagetable entry invalid

Load Address Space Parameters

Primaryspace mode Parameters loaded

----

3 1

ESA/390 Reference Summary

See note Table length exceeded or ART exception Length > 256

Condition Codes (Cont'd)

Condition Code → Mask Bit Value → Move to Secondary Move with Key Page In

0 8 Length ≤ 256 Length ≤ 256 Operation completed

1 4

2 2

----

----

----

----

ES data error

----

Page Out

Operation completed

ES data error

----

Program Return Reset Reference Bit Extended Resume Program Set Clock

See note Ref = 0, Chg = 0 See note Set

See note Ref = 0, Chg = 1 See note Secure

See note Ref = 1, Chg = 0 See note ----

Signal Processor

Accepted

Busy

Store System Information Test Access

Info provided ALET = 0

Status stored ---ALET uses DUALD

ALET uses PSALD

Test Block Test Protection

Usable Fetch and store allowed

Unusable Fetch allowed; no store allowed

---No fetch or store allowed

Function started Function started Function started

----

----

----

----

Nonintermediate status pending Status pending ----

Busy

Status pending Status pending Zeros stored ----

Not applicable Busy

Interruption code stored Status was not pending

----

Input/Output Instructions Cancel Subchannel Clear Subchannel Halt Subchannel

Modify Subchannel Reset Channel Path Resume Subchannel Start Subchannel Store Channel Report Word Store Subchannel Test Pending Interruption

Test Subchannel

Function executed Function started Function started Function started CRW stored SCHIB stored Interruption not pending Status was pending

----

Busy Busy

-------

----

3 1 Length > 256 Length > 256 ES block not available ES block not available See note Ref = 1, Chg = 1 See note Not operational Not operational Info not available ALET = 1 or causes ART exception ---Translation not available

Not operational Not operational Not operational

Not operational Not operational Not operational Not operational ---Not operational ----

Not operational

Notes: For Diagnose, the resulting condition code is model-dependent. For Load PSW and Resume Program, the condition code is loaded from the conditioncode field of the second operand. For Program Return, the resulting condition code is unpredictable. For Set Program Mask, the condition code is loaded from bit positions 2 and 3 of the first operand.

19

| Operand of Store Clock | ┌───────────────────────────┐ | │ Bits -63 of │ | │ Time-of-Day (TOD) Clock │ | └───────────────────────────┘ | 63 | Note: Bit 51 of the TOD clock corresponds to one microsecond.

Operand of Store Clock Extended ┌───────┬──────────────────────────────────┬──────────────┐ │ │ │ Programmable │ │ Zeros │ Time-of-Day (TOD) Clock │ Field │ └───────┴──────────────────────────────────┴──────────────┘ 8 112 127

Note: Bit 51 of the TOD clock (bit 59 of the operand) corresponds to one microsecond.

Assembler Instructions Function Option control

Mnemonic *PROCESS ACONTROL

Meaning Specify assembler options Dynamically modify options

Data definition

CCW CCW0 CCW1 DC DS

Define Define Define Define Define

Program sectioning and linking

ALIAS AMODE CATTR COM CSECT CXD DSECT DXD ENTRY EXTRN LOCTR RMODE RSECT START WXTRN XATTR

Rename external symbol Specify addressing mode Define class name and attributes Identify common control section Identify control section Cumulative length of external dummy section Identify dummy section Define external dummy section Identify entry-point symbol Identify external symbol Specify multiple location counters Specify residence mode Identify read-only control section Start assembly Identify weak external symbol Declare external symbol attributes

Base register assignment

DROP USING

Drop base address register Use base address and register

Control of listings

AEJECT ASPACE CEJECT EJECT PRINT SPACE TITLE

Start new page in macro definition Space lines in macro definition Conditional start new page Start new page Print optional data Space listing Identify assembly output

20

channel command word format-0 channel command word format-1 channel command word constant storage

ESA/390 Reference Summary

Assembler Instructions (Cont'd)

Function Program control

|

Mnemonic ADATA CNOP COPY END EQU EXITCTL ICTL ISEQ LTORG OPSYN ORG POP PUNCH PUSH

|

REPRO Conditional assembly

ACTR AGO AIF AINSERT ANOP AREAD GBLA GBLB GBLC LCLA LCLB LCLC MHELP MNOTE SETA SETAF SETB SETC SETCF

Macro definition

MACRO MEND MEXIT

Meaning Provide data for SYSADATA file Conditional no operation Copy predefined source coding End assembly Equate symbol Program control data for I/O exits Input format control Input sequence checking Begin literal pool Equate operation code Set location counter Restore ACONTROL, PRINT, or USING status Punch a record Save current ACONTROL, PRINT, or USING status Reproduce following record Conditional assembly branch counter Unconditional branch Conditional branch Create input record Assembly no operation Assign input record to SETC symbol Define global SETA symbol Define global SETB symbol Define global SETC symbol Define local SETA symbol Define local SETB symbol Define local SETC symbol Trace macro flow Generate error message Set arithmetic variable symbol Set arithmetic variable symbol from external function Set binary variable symbol Set character variable symbol Set character variable symbol from external function Macro definition header Macro definition trailer Macro definition exit

Source: SC26-4940. Applies also to following two tables.

Extended-Mnemonic Instructions for Branch on Condition Extended Mnemonic* (RX or RR) Meaning B or BR Unconditional Branch NOP or NOPR No Operation

Machine Instr.* (RX or RR) BC or BCR 15, BC or BCR 0,

After Compare Instructions (A:B)

BH or BHR BL or BLR BE or BER BNH or BNHR BNL or BNLR BNE or BNER

Branch Branch Branch Branch Branch Branch

on on on on on on

A A A A A A

BC BC BC BC BC BC

or or or or or or

BCR BCR BCR BCR BCR BCR

2, 4, 8, 13, 11, 7,

After Arithmetic Instructions

BP or BPR BM or BMR BZ or BZR BO or BOR BNP or BNPR BNM or BNMR BNZ or BNZR BNO or BNOR

Branch Branch Branch Branch Branch Branch Branch Branch

on on on on on on on on

Plus Minus Zero Overflow Not Plus Not Minus Not Zero No Overflow

BC BC BC BC BC BC BC BC

or or or or or or or or

BCR BCR BCR BCR BCR BCR BCR BCR

2, 4, 8, 1, 13, 11, 7, 14,

After Test under Mask instruction

BO or BOR BM or BMR BZ or BZR BNO or BNOR BNM or BNMR BNZ or BNZR

Branch Branch Branch Branch Branch Branch

if if if if if if

BC BC BC BC BC BC

or or or or or or

BCR BCR BCR BCR BCR BCR

1, 4, 8, 14, 11, 7,

Use General

High Low Equal B Not High Not Low Not Equal B

Ones Mixed Zeros Not Ones Not Mixed Not Zeros

*Second operand, not shown, is D (X, B) for RX format and R for RR format.

21

Extended-Mnemonic Instructions for Relative-Branch Instructions Extended Mnemonic BRU or J BRUL or JLU JNOP*

Meaning Unconditional Branch Relative Unconditional Branch Relative No Operation

Machine Instr. BRC 15,I BRCL 15,I BRC 0,I

After Compare Instructions (A:B)

BRH or JH* BRL or JL* BRE or JE* BRNH or JNH* BRNL or JNL* BRNE or JNE*

Branch Branch Branch Branch Branch Branch

Relative Relative Relative Relative Relative Relative

on on on on on on

A A A A A A

BRC BRC BRC BRC BRC BRC

2,I 4,I 8,I 13,I 11,I 7,I

After Arithmetic Instructions

BRP or JP* BRM or JM* BRZ or JZ* BRO or JO* BRNP or JNP* BRNM or JNM* BRNZ or JNZ* BRNO or JNO*

Branch Branch Branch Branch Branch Branch Branch Branch

Relative Relative Relative Relative Relative Relative Relative Relative

on on on on on on on on

Plus Minus Zero Overflow Not Plus Not Minus Not Zero No Overflow

BRC BRC BRC BRC BRC BRC BRC BRC

2,I 4,I 8,I 1,I 13,I 11,I 7,I 14,I

After Test under Mask instruction

BRO or JO* BRM or JM* BRZ or JZ* BRNO or JNO* BRNM or JNM* BRNZ or JNZ*

Branch Branch Branch Branch Branch Branch

Relative Relative Relative Relative Relative Relative

if if if if if if

BRC BRC BRC BRC BRC BRC

1,I 4,I 8,I 14,I 11,I 7,I

Non-Branch Relative on Condition

JAS JASL JCT JXH JXLE

Branch Relative and Save Branch Relative and Save Long Branch Relative on Count Branch Relative on Index High Br. Rel. on Index Low or Equal

Use General Branch Rel. on Condition

High Low Equal B Not High Not Low Not Equal B

Ones Mixed Zeros Not Ones Not Mixed Not Zeros

BRAS R ,I BRASL R ,I BRCT R ,I BRXH R ,R ,I BRXLE R ,R ,I

*To obtain BRCL instead of BRC, add L at the end of the B mnemonic or insert L after the J of the J mnemonic. For example, change BRNZ or JNZ to BRNZL or JLNZ.

CNOP Alignment ┌───────────────────────────────────────────────────────┐ │ Doubleword │ ├───────────────────────────┬───────────────────────────┤ │ Word │ Word │ ├─────────────┬─────────────┼─────────────┬─────────────┤ │ Halfword │ Halfword │ Halfword │ Halfword │ ├─────────────┴─────────────┴─────────────┴─────────────┤ │ Byte │ Byte │ Byte │ Byte │ Byte │ Byte │ Byte │ Byte │ └───────────────────────────────────────────────────────┘     ┌─┴─┐ ┌─┴─┐ ┌─┴─┐ ┌─┴─┐ ,4 2,4 ,4 2,4 ,8 2,8 4,8 6,8 Source: SC26-4940.

22

ESA/390 Reference Summary

Summary of Constants |

|

Type A AD B C CU D DB DH E EB EH F FD G H J L LB LH P Q R S V X Y Z

Implied Length, Bytes 4 8 Even 8 8 8 4 4 4 4 8 Even 2 4 16 16 16 4 4 2 4 2 -

Default Alignment Word Doubleword Byte Byte Byte Doubleword Doubleword Doubleword Word Word Word Word Doubleword Byte Halfword Word Doubleword Doubleword Doubleword Byte Word Word Halfword Word Byte Halfword Byte

Format Value of address Value of address Binary digits Characters Characters, translated to Unicode Long hex floating point Long binary floating point Long hex floating point Short hex floating point Short binary floating point Short hex floating point Fixed-point binary Fixed-point binary Graphic (double-byte) characters Fixed-point binary Symbol naming a DXD, DSECT, or class Extended hex floating point Extended binary floating point Extended hex floating point Packed decimal Symbol naming a DXD or DSECT PSECT address value Address in base-displacement form Externally defined address value Hexadecimal digits Value of address Zoned decimal

Truncation/ Padding Left Left Left Right Right Right Right Right Right Right Right Left Left Right Left Left Right Right Right Left Left Left Left Left Left

Source: SC26-4940.

Fixed Storage Locations Area (Dec) 0-7 0-7 8-15 8-15 16-23 24-31 32-39 40-47 48-55 56-63 88-95 96-103 104-111 112-119 120-127 128-131 132-133

Addr Type A R A R A R R R R R R R R R R R R

Hex Addr 0 0 8 8 10 18 20 28 30 38 58 60 68 70 78 80 84

134-135

R

136-139

R

88

140-143

R

8C

144-147

R

90

144-147

R

90

148-149

R

94

150-151

R

96

150-151

R

96

152-155 156-159 160

R R R

98 9C A0

161

R

A1

86

Function Initial-program-loading PSW Restart new PSW Initial-program-loading CCW1 Restart old PSW Initial-program-loading CCW2 External old PSW Supervisor-call old PSW Program old PSW Machine-check old PSW Input/output old PSW External new PSW Supervisor-call new PSW Program new PSW Machine-check new PSW Input/output new PSW External-interruption parameter CPU address associated with external interruption, or zeros External-interruption code (see table on page 24) SVC-interruption identification (0-12 zeros, 13-14 ILC, 15 zero, 16-31 code) Program-interruption identification (0-12 zeros, 13-14 ILC, 15 zero, 16-31 code) Data-exception code (0-23 zeros, 24-31 code (see table on page 26)) Translation-exception identification (see table on page 26) Monitor-class number (0-7 zeros, 8-15 number) PER-1 code (0 successful branching, 1 instruction fetching, 2 storage alteration or stura, 3 general-register alteration, 4-15 zeros) PER-2 code (0 successful branching, 1 instruction fetching, 2 storage alteration, 2 and 4 stura, 3 and 5-8 zeros, 9-13 ATMID, 14-15 SI) PER address (0 zero, 1-31 address) Monitor code Exception access identification (0-3 zeros, 4-7 access-register number) PER access identification (0-3 zeros, 4-7 access-register number)

23

Fixed Storage Locations (Cont'd)

Area (Dec) 162

Addr Type R

163

Hex Addr A2

A/R

A3

184-187

R

B8

188-191 192-195

R R

BC C0

196-199

R

C4

200-203

R

C8

212-215

A/R

D4

216-223

A/R

D8

224-231

A/R

E0

232-239

R

E8

244-247

R

F4

248-251

R

F8

256-263 256-271 264-267 288-351

A R A A/R

100 100 108 120

352-383

A/R

160

384-447

A/R

180

448-511

A/R

1C0

Function Operand access identification (if pagetranslation exception recognized by Move Page (facility 2): 0-3 R , 4-7 R) Store-status/machine-check architecturalmode identification (if z/Architecture installed: zeros) Subsystem-identification word (0-14 zeros, 15 one, 16-31 subchannel number) I/O-interruption parameter I/O-interruption-identification word (0-1 zeros, 2-4 I/O-interruption subclass, 5-31 zeros) PCF-entry-table origin (0 and 20-31 zeros, 1-19 origin) STFL facility list (0 certain z/Architecture instructions available, 1 z/Architecture installed, 2 z/Architecture active, 16 extended-translation facility 2 installed) Store-status/machine-check extended-savearea address (0 and 20-31 zeros, 1-19 address or zeros)** Store-status/machine-check CPU-timer save area Store-status/machine-check clockcomparator save area Machine-check-interruption code (see diagram on page 40) External-damage code (see diagram on page 40) Failing-storage address (0 zero, 1-31 address) Store-status PSW save area Fixed-logout area* Store-status prefix save area Store-status/machine-check access-register save area Store-status/machine-check floating-pointregister save area (registers 0, 2, 4, 6 only) Store-status/machine-check general-register save area Store-status/machine-check control-register save area

A=Absolute address. R=Real address. A/R=A if store status, R if machine check. * Contents may vary among models; see System Library manuals. ** Extended-save-area contents: 0-127 floating-point registers 0-15, 128-131 floating-point-control register.

External-Interruption Codes At real-storage locations 134-135 (86-87 hex) Code (Hex) 0040 1003 1004 1005 1200 1201 1202 1406 2401

24

Condition Interrupt key TOD-clock-sync check Clock comparator CPU timer Malfunction alert Emergency signal External call ETR Service signal

ESA/390 Reference Summary

Program-Interruption Codes At real-storage locations 142-143 (8E-8F hex) Code (Hex) 0001 0002 0003 0004 0005 0006 0007 nn08* 0009 000A 000B nn0C* nn0D* nn0E* nn0F* 0010 0011 0012 0013 0015 0016 0017 0019 001C nn1D* nn1E* 001F 0020 0021 0022 0023 0024 0025 0028 0029 002A 002B 002C 002D 0030 0031 0032 0033 0034 0040 0080 0119

Condition Operation exception Privileged-operation exception Execute exception Protection exception Addressing exception Specification exception Data exception Fixed-point-overflow exception Fixed-point-divide exception Decimal-overflow exception Decimal-divide exception HFP-exponent-overflow exception HFP-exponent-underflow exception HFP-significance exception HFP-floating-point-divide exception Segment-translation exception Page-translation exception Translation-specification exception Special-operation exception Operand exception Trace-table exception ASN-translation-specification exception Vector-operation exception Space-switch event HFP-square-root exception Unnormalized-operand exception PC-translation-specification exception AFX-translation exception ASX-translation exception LX-translation exception EX-translation exception Primary-authority exception Secondary-authority exception ALET-specification exception ALEN-translation exception ALE-sequence exception ASTE-validity exception ASTE-sequence exception Extended-authority exception Stack-full exception Stack-empty exception Stack-specification exception Stack-type exception Stack-operation exception Monitor event PER event (code may be combined with another code) Crypto-operation exception

* Use the exception-extension-code table on page 26 for bits 0-7 (nn) of the program-interruption code.

25

Exception-Extension Code ┌───────────────┐ │a v w w r r r r│ └───────────────┘ 7 Bit 0

1 2-3 4-7

Meaning (a) Arithmetic-partial-completion bit 0 Completion or suppression of instruction, and bits 1-7 of the exception-extension code are also zero 1 Partial completion of vector instruction (v) Arithmetic-result location 0 Scalar register 1 Vector register (ww) Arithmetic-result width 01 4-byte result 10 8-byte result (rrrr) Register number of result register designated by the interrupted instruction

Translation-Exception Identification At real-storage locations 144-147 (90-93 hex) Interruption Code Exception or (Hex) Event 0004 Protection

0010 0011

Segment translation Page translation

001C

Space switch

0020 0021 0022 0023 0024 0025

AFX translation ASX translation LX translation EX translation Primary authority Secondary authority

Format of Information Stored If 29 zero: rest unpredictable If 29 one: suppression, 1-19 address; if DAT was on, 30-31 STD identification, rest unpredictable, location 160 valid; if DAT was off, rest unpredictable 0 secondary address, 1-19 address, 20-29 unpredictable, 30-31 STD identification 0 secondary address; 1-19 address; 20-28 unpredictable; if 29 zero, not Move Page (facility 2); if 29 one, Move Page (facility 2) (see location 162); 30-31 STD identification From primary-space mode: 0 old primaryspace-switch-event control, 1-15 zeros, 16-31 old PASN From home-space mode: 0 home-spaceswitch-event control, 1-31 zeros 0-15 zeros, 16-31 address-space number 0-15 zeros, 16-31 address-space number 0-11 zeros, 12-31 program-call number 0-11 zeros, 12-31 program-call number 0-15 zeros, 16-31 address-space number 0-15 zeros, 16-31 address-space number

Data-Exception Code (DXC) At real-storage location 147 (93 hex) and in byte 2 of floatingpoint-control register Code (Hex) 00 01 02 08 0C 10 18 1C 20 28 2C 40 80

26

Data Exception Decimal operand AFP register BFP instruction IEEE inexact and truncated IEEE inexact and incremented IEEE underflow, exact IEEE underflow, inexact and truncated IEEE underflow, inexact and incremented IEEE overflow, exact IEEE overflow, inexact and truncated IEEE overflow, inexact and incremented IEEE division by zero IEEE invalid operation

ESA/390 Reference Summary

Control Registers CR 0

Bits 1 2 3 4 5 6 7 8-12 13 14 15 16 17 18 19 20 21 22 24 25 26 27 28

1

29 0-31 0 1-19 22 23 24 25-31

2

1-25

3

& 5 6

0-15 16-31 0-15 16-31 0 1-24 25-31 ----1-25 0-7

7

0-31

4 5

1-19 22 23 24 25-31 8

0-15 16-31

Name of Field SSM-suppression control TOD-clock-sync control Low-address-protection control Extraction-authority control Secondary-space control Fetch-protection-override control Storage-protectionoverride control Translation format (10110 binary) AFP-register control Vector control Address-space-function control Malfunction-alert subclass mask Emergency-signal subclass mask External-call subclass mask TOD-clock sync-check subclass mask Clock-comparator subclass mask CPU-timer subclass mask Service-signal subclass mask Unused (See note) Interrupt-key subclass mask Unused (See note) ETR subclass mask Program-call-fast control Crypto control Primary segment-table designation Primary space-switchevent control Primary segment-table origin Primary subspace-group control Primary private-space control Primary storagealteration-event control Primary segment-table length Dispatchable-unit-controltable origin PSW-key mask Secondary ASN Authorization index Primary ASN Subsystem-linkage control Linkage-table origin Linkage-table length --------------------------Primary-ASTE origin I/O-interruption subclass mask Secondary segmenttable designation Secondary segment-table origin Secondary subspace-group control Secondary private-space control Secondary-storagealteration-event control Secondary segment-table length Extended authorization index Monitor masks

Associated with SSM instruction TOD clock Low-address protection

Init* 0 0 0

Instruction authorization Instruction authorization Key-controlled protection

0 0 0

Key-controlled protection

0

Dynamic address translation Floating point Vector operations Instruction authorization

0

External interruptions

0

External interruptions

0

External interruptions

0

External interruptions

0

External interruptions

0

External interruptions External interruptions

0 0

External interruptions

1 1

External interruptions Program Call Fast

1 0 0

0 0 0

Cryptography Dynamic address translation Program interruptions

0 0

Dynamic address translation Subspace groups

0

Dynamic address translation Program-event rec. 2 only

0

Dynamic address translation Access-register translation Instruction authorization Address spaces Instruction authorization Address spaces Instruction authorization PC-number translation PC-number translation --------------------------Access-register translation I/O interruptions

0

0

0

0

0 0 0 0 0 0 0 0 --0 0

Dynamic address translation Dynamic address translation Subspace groups

0

Dynamic address translation Program-event rec. 2 only

0

Dynamic address translation Access-register translation MC instruction

0

0 0

0

0 0

27

Control Registers (Cont'd)

CR 9

Bits 0 1 2 3 4 8 10 16-31

10 11 12

13

1-31 1-31 0 1-29 30 31 0-31 0 1-19 23 24 25-31

14

0 1 2 3 4 5 6 7 10

15

12 13-31 1-28

Name of Field Successful-branchingevent mask Instruction-fetchingevent mask Storage-alterationevent mask GR-alteration-event mask Store-using-real-addressevent mask Branch-address control Storage-alteration-space control PER general-register masks PER starting address PER ending address Branch-trace control Trace-entry address ASN-trace control Explicit-trace control Home segment-table designation Home space-switch-event control Home segment-table origin Home private-space control Home storagealteration-event control Home segment-table length Unused (See note) Unused (See note) Extended-save-area control Channel-report-pending subclass mask Recovery subclass mask Degradation subclass mask External-damage subclass mask Warning subclass mask TOD-clock-controloverride control ASN-translation control ASN-first-table origin Linkage-stack-entry address

Associated with Program-event recording

Init* 0

Program-event recording

0

Program-event recording

0

Program-event rec. 1 only Program-event recording

0 0

Program-event rec. 2 only Program-event rec. 2 only

0 0

Program-event rec. 1 only

0

Program-event recording Program-event recording Tracing Tracing Tracing Tracing Dynamic address translation Program interruptions

0 0 0 0 0 0 0

Dynamic address translation Dynamic address translation Program-event rec. 2 only

0

Dynamic address translation

0

Floating point

0

0 0

1 1 0

I/O machine-check handling Machine-check handling Machine-check handling Machine-check handling

0

Machine-check handling TOD clock

0 0

Instruction authorization ASN translation Linkage-stack operations

0 0 0

0 0 1

* Value after initial CPU reset. & The interpretation of control register 5 depends on the state of bit 15 of control register 0, the address-space-function control. Note: This bit is not used but is initialized to one for consistency with the System/370 definition.

28

ESA/390 Reference Summary

Floating-Point-Control (FPC) Register ┌──────Masks──────┬──────Flags──────┐ ┌─────────────────┬─────────────────┬────────────┬───────┬──┐ │i z o u x │i z o u x │ DXC │ │RM│ └─────────────────┴─────────────────┴────────────┴───────┴──┘ 8 16 24 31

Bit 0 1 2 3 4 8 9 10 11 12 16-23 30-31

Meaning (IMi) IEEE-invalid-operation mask (IMz) IEEE-division-by-zero mask (IMo) IEEE-overflow mask (IMu) IEEE-underflow mask (IMx) IEEE-inexact mask (SFi) IEEE-invalid-operation flag (SFz) IEEE-division-by-zero flag (SFo) IEEE-overflow flag (SFu) IEEE-underflow flag (SFx) IEEE-inexact flag (DXC) Data-exception code (see table on page 26) (RM) Rounding mode 00 Round to nearest 01 Round toward 0 10 Round toward +∞ 11 Round toward −∞

Program-Status Word (PSW) ┌─┬─┬───┬─┬─┬─┬────┬─┬─┬─┬─┬──┬──┬───────┬───────────┐ │ │ │ │ │ │ │PSW │ │ │ │ │ │ │Program│ │ │ │R│ │T│I│E│Key │1│M│W│P│AS│CC│ Mask │ │ └─┴─┴───┴─┴─┴─┴────┴─┴─┴─┴─┴──┴──┴───────┴───────────┘ 5 8 12 16 18 2 24 31 ┌─┬──────────────────────────────────────────────────┐ │A│ Instruction Address │ └─┴──────────────────────────────────────────────────┘ 32 63 Bit 1 5 6 7 13 14 15 16-17

18-19 20 21 22 23 32

Meaning (R) Program-event-recording mask (T = 1) DAT mode (I) Input/output mask (E) External mask (M) Machine-check mask (W = 1) Wait state (P = 1) Problem state (AS) Address-space control xx Real mode (T = 0) 00 Primary-space mode (T = 1) 01 Access-register mode (T = 1) 10 Secondary-space mode (T = 1) 11 Home-space mode (T = 1) (CC) Condition code Fixed-point-overflow mask Decimal-overflow mask HFP-exponent-underflow mask HFP-significance mask (A = 1) 31-bit addressing mode

Vector-Status Register ┌──────────────────┬─┬───────────┬────────────┬─────┬─────┐ │ │M│ VCT │ VIX │ VIU │ VCH │ └──────────────────┴─┴───────────┴────────────┴─────┴─────┘ 16 32 48 56 63

Bit 15 16-31 32-47 48-55 56-63

Meaning (M) Vector-mask-mode bit (VCT) Vector count (VIX) Vector interruption index (VIU) Vector in-use bits (VCH) Vector change bits

29

Dynamic Address Translation Dynamic-Address-Translation Format Addr Mode 24 31

Segment Size 1M 1M

Page Size 4K 4K

Ignored 0-7 0

Virtual Address Fields Segment Page Index Index 8-11 12-19 1-11 12-19

Byte Index 20-31 20-31

Note: Control register 0 bits 8-12 must contain 10110 (binary); any other combination of bits 8-12 is invalid for translation.

Segment-Table Designation (STD) ┌─┬─────────────────────────────────────┬──┬─┬─┬─┬───────┐ │X│ Segment-Table Origin │ │G│P│S│ STL │ └─┴─────────────────────────────────────┴──┴─┴─┴─┴───────┘ 1 2 22 25 31 Bit 0 22 23 24 25-31

Meaning (X) Space-switch-event control (G) Subspace-group control (P) Private-space control (S) Storage-alteration-event control (STL) Segment-table length (× 64 bytes)

Segment-Table Entry (STE) ┌─┬─────────────────────────────────────────────┬─┬─┬────┐ │ │ Page-Table Origin │I│C│PTL │ └─┴─────────────────────────────────────────────┴─┴─┴────┘ 1 26 28 31 Bit 26 27 28-31

Meaning (I) Segment-invalid bit (C) Common-segment bit (PTL) Page-table length

Page-Table Entry (PTE) ┌─┬─────────────────────────────────────┬─┬─┬─┬─┬────────┐ │ │ Page-Frame Real Address │ │I│P│ │ │ └─┴─────────────────────────────────────┴─┴─┴─┴─┴────────┘ 1 2 24 31 Bit 21 22

Meaning (I) Page-invalid bit (P) Page-protection bit

ASN Translation Address-Space Number (ASN) ┌──────────────────┬─────────────┐ │ ASN-First│ ASN-Second- │ │ Table Index │ Table Index │ └──────────────────┴─────────────┘ 1 15

ASN-First-Table Entry (when CR0 Bit 15 Is Zero) ┌─┬──────────────────────────────────────────────────┬────┐ │I│ ASN-Second-Table Origin │ │ └─┴──────────────────────────────────────────────────┴────┘ 1 28 31 Bit 0

30

Meaning (I) AFX-invalid bit

ESA/390 Reference Summary

ASN Translation (Cont'd)

ASN-First-Table Entry (when CR0 Bit 15 Is One) ┌─┬────────────────────────────────────────────────┬──────┐ │I│ ASN-Second-Table Origin │ │ └─┴────────────────────────────────────────────────┴──────┘ 1 26 31 Bit 0

Meaning (I) AFX-invalid bit

ASN-Second-Table Entry (ASTE) Byte (Hex) ┌─┬───────────────────────────────────────────────────┬─┬─┐ │I│ Authority-Table Origin │ │B│ └─┴───────────────────────────────────────────────────┴─┴─┘ 1 3 31 ┌───────────────────────────┬────────────────────────┬────┐ 4│ Authorization Index │ Authority-Table Length │ │ └───────────────────────────┴────────────────────────┴────┘ 16 28 31 ┌─────────────Segment-Table Designation (STD)─────────────┐ ┌─┬──────────────────────────────────────┬──┬─┬─┬─┬───────┐ 8│X│ Segment-Table Origin │ │G│P│S│ STL │ └─┴──────────────────────────────────────┴──┴─┴─┴─┴───────┘ 1 2 22 25 31 ┌─────────────Linkage-Table Designation (LTD)─────────────┐ ┌─┬───────────────────────────────────────────────┬───────┐ C│V│ Linkage-Table Origin │ LTL │ └─┴───────────────────────────────────────────────┴───────┘ 1 25 31

The following extension exists if CR0 bit 15 is one: ┌─┬───────────────────────────────────────────────┬───────┐ 1 │ │ Primary-Space Access-List Origin │ ALL │ └─┴───────────────────────────────────────────────┴───────┘ 1 25 31 ┌─────────────────────────────────────────────────────────┐ 14│ ASN-Second-Table-Entry Sequence Number │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 18│ │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 1C│/////////////////////////////////////////////////////////│ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 2 │ │ / / 3C│ │ └─────────────────────────────────────────────────────────┘ 31 Byte.Bit 0.0 0.31 4.16-27 8.0-31 C.0 C.25-31 10.25-31 ///

Meaning (I) ASX-invalid bit (B) Base-space bit (ATL) authority-table length (× 4 bytes) See STD on page 30 (V) Subsystem-linkage control (LTL) Linkage-table length (× 128 bytes) (ALL) Access-list length, format 0 (× 128 bytes); in format 1, bits 24-31 (× 256 bytes) Available for programming

31

PC-Number Translation Program-Call Number ┌─────────────────────┬─────────────────────┬─────────────┐ │ │ Linkage Index │ Entry Index │ └─────────────────────┴─────────────────────┴─────────────┘ 12 24 31

Linkage-Table Entry (LTE) ┌─┬─────────────────────────────────────────────┬─────────┐ │I│ Entry-Table Origin │ ETL │ └─┴─────────────────────────────────────────────┴─────────┘ 1 26 31 Meaning (I) LX-invalid bit (ETL) Entry-table length (× 128 bytes)

Bit 0 26-31

Entry-Table Entry (ETE) Byte (Hex) ┌────────────────────────────┬────────────────────────────┐ │ Authorization Key Mask │ Address-Space Number │ └────────────────────────────┴────────────────────────────┘ 16 31 ┌─┬─────────────────────────────────────────────────────┬─┐ 4│A│ Bits 1-3 of Entry Instruction Address │P│ └─┴─────────────────────────────────────────────────────┴─┘ 1 31 ┌─────────────────────────────────────────────────────────┐ 8│ Entry Parameter │ └─────────────────────────────────────────────────────────┘ 31 ┌────────────────────────────┬────────────────────────────┐ C│ Entry Key Mask │ │ └────────────────────────────┴────────────────────────────┘ 16 31

The following extension exists if CR0 bit 15 is one: ┌─┬──┬─┬─┬─┬─┬─┬──────┬──────┬────────────────────────────┐ 1 │T│ │K│M│E│C│S│ EK │ │ Entry Ext. Auth. Index │ └─┴──┴─┴─┴─┴─┴─┴──────┴──────┴────────────────────────────┘ 1 3 8 12 16 31 ┌─┬────────────────────────────────────────────────┬──────┐ 14│ │ ASN-Second-Table-Entry Address │ │ └─┴────────────────────────────────────────────────┴──────┘ 1 26 31 ┌─────────────────────────────────────────────────────────┐ 18│ │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 1C│ │ └─────────────────────────────────────────────────────────┘ 31 Byte.Bit 4.0 4.31 10.0 10.3 10.4 10.5 10.6 10.7 10.8-11

32

Meaning (A) Entry addressing mode (P) Entry problem state (T) PC-type bit (zero: basic; one: stacking) (K) PSW-key control (zero: unchanged; one: replace if stacking (M) PSW-key-mask control (zero: Or; one: replace if stacking) (E) EAX control (zero: unchanged; one: replace if stacking) (C) Address-space-control control (S) Secondary-ASN control (EK) Entry key

ESA/390 Reference Summary

Access-Register Translation Access-List-Entry Token (ALET) ┌──────────┬─┬───────────────┬────────────────────────────┐ │ │P│ ALESN │ Access-List-Entry Number │ └──────────┴─┴───────────────┴────────────────────────────┘ 7 8 16 31 Bit 7 8-15

Meaning (P) Primary-list bit (zero: use DUCT; one: use primary ASTE) (ALESN) Access-list-entry sequence number

Dispatchable-Unit-Control Table (DUCT) Byte (Hex) ┌─┬───────────────────────────────────────────────────────┐ │ │ Base-ASTE Origin │ └─┴───────────────────────────────────────────────────────┘ 1 31 ┌─┬───────────────────────────────────────────────────────┐ 4│S│ │ │A│ Subspace-ASTE Origin │ └─┴───────────────────────────────────────────────────────┘ 1 31 ┌─────────────────────────────────────────────────────────┐ 8│ │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ C│ Subspace-ASTE Sequence Number │ └─────────────────────────────────────────────────────────┘ 31 ┌─┬───────────────────────────────────────────────┬───────┐ 1 │ │ Dispatchable-Unit Access-List Origin │ ALL │ └─┴───────────────────────────────────────────────┴───────┘ 1 25 31 ┌─────────────────────────────────────────────────────────┐ 14│ │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 18│ │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 1C│/////////////////////////////////////////////////////////│ └─────────────────────────────────────────────────────────┘ 31 ┌─┬───────────────────────────────────────────────────────┐ 2 │A│ Return Address │ └─┴───────────────────────────────────────────────────────┘ 1 31 ┌────────────────────────────┬────────────────┬────┬─┬──┬─┐ 24│ │ │PSW │R│ │ │ │ PSW-Key Mask │ │Key │A│ │P│ └────────────────────────────┴────────────────┴────┴─┴──┴─┘ 16 24 28 31 ┌─────────────────────────────────────────────────────────┐ 28│ │ └─────────────────────────────────────────────────────────┘ 31

33

Access-Register Translation (Cont'd)

Dispatchable-Unit-Control Table (DUCT) (Cont'd) Byte (Hex) ┌─┬──────────────────────────────────────────────────┬──┬─┐ 2C│ │ Trap-Control-Block Address │ │E│ └─┴──────────────────────────────────────────────────┴──┴─┘ 1 28 31 ┌─────────────────────────────────────────────────────────┐ 3 │ │ / / 3C│ │ └─────────────────────────────────────────────────────────┘ 31 Byte.Bit 4.0 10.25-31 24.28 24.31 2C.31 ///

Meaning (SA) Subspace-active bit (ALL) Access-list length, format 0 (× 128 bytes); in format 1, bits 24-31 (× 256 bytes) (RA) Reduced-authority bit (P) Problem-state bit (E) TRAP-enabled bit Available for programming

Access-List Entry (ALE) ┌─┬─────┬─┬─┬────────────────┬────────────────────────────┐ │ │ │F│ │ │ Access-List-Entry │ │I│ │O│P│ ALESN │ Authorization Index │ └─┴─────┴─┴─┴────────────────┴────────────────────────────┘ 1 6 8 16 31 ┌─────────────────────────────────────────────────────────┐ │ │ └─────────────────────────────────────────────────────────┘ 32 63 ┌─┬────────────────────────────────────────────────┬──────┐ │ │ ASN-Second-Table-Entry Origin │ │ └─┴────────────────────────────────────────────────┴──────┘ 64 9 95 ┌─────────────────────────────────────────────────────────┐ │ ASN-Second-Table-Entry Sequence Number │ └─────────────────────────────────────────────────────────┘ 96 127 Bit 0 6 7 8-15

34

Meaning (I) ALEN-invalid bit (FO) Fetch-only bit (P) Private bit (ALESN) Access-list-entry sequence number

ESA/390 Reference Summary

Linkage-Stack Entries Entry Descriptor ┌─┬──────────┬────────────────┬─────────────────────────────┐ │U│Entry Type│ Section ID │ Remaining Free Space │ └─┴──────────┴────────────────┴─────────────────────────────┘ 1 8 16 31 ┌─────────────────────────────┬─────────────────────────────┐ │ Next-Entry Size │ │ └─────────────────────────────┴─────────────────────────────┘ 32 48 63 Bit 0 1-7

Meaning (U) Unstack-suppression bit Entry type: Header entry = 0000001 binary Trailer entry = 0000010 binary Branch state entry = 0000100 binary Program-call state entry = 0000101 binary Available for program use = 1xxxxxx binary

Header Entry (Entry Type 0000001) ┌───────────────────────────────────────────────────────────┐ │///////////////////////////////////////////////////////////│ └───────────────────────────────────────────────────────────┘ 31 ┌─┬─────────────────────────────────────────────────────┬───┐ │B│ Backward Stack-Entry Address │ │ └─┴─────────────────────────────────────────────────────┴───┘ 32 61 63 ┌───────────────────────────────────────────────────────────┐ │ Entry Descriptor (First Half) │ └───────────────────────────────────────────────────────────┘ 64 95 ┌───────────────────────────────────────────────────────────┐ │ Entry Descriptor (Second Half) │ └───────────────────────────────────────────────────────────┘ 96 127 Bit 32 ///

Meaning (B) Backward stack-entry validity bit Available for programming

Trailer Entry (Entry Type 0000010) ┌───────────────────────────────────────────────────────────┐ │///////////////////////////////////////////////////////////│ └───────────────────────────────────────────────────────────┘ 31 ┌─┬─────────────────────────────────────────────────────┬───┐ │F│ Forward-Section-Header Address │ │ └─┴─────────────────────────────────────────────────────┴───┘ 32 61 63 ┌───────────────────────────────────────────────────────────┐ │ Entry Descriptor (First Half) │ └───────────────────────────────────────────────────────────┘ 64 95 ┌───────────────────────────────────────────────────────────┐ │ Entry Descriptor (Second Half) │ └───────────────────────────────────────────────────────────┘ 96 127 Bit 32 ///

Meaning (F) Forward-section validity bit Available for programming

35

Linkage-Stack Entries (Cont'd)

Branch State Entry (Entry Type 0000100) and Program-Call State Entry (Entry Type 0000101) Byte (Hex) ┌─────────────────────────────────────────────────────────┐ │ │ / Contents of General Registers -15 / 38│ │ └─────────────────────────────────────────────────────────┘ 63 ┌─────────────────────────────────────────────────────────┐ 4 │ │ / Contents of Access Registers -15 / 78│ │ └─────────────────────────────────────────────────────────┘ 63 ┌──────────────┬─────────────┬──────────────┬─────────────┐ 8 │ PSW-Key Mask │Secondary ASN│Ext Auth Index│ Primary ASN │ └──────────────┴─────────────┴──────────────┴─────────────┘ 16 32 48 63 ┌─────────────────────────────────────────────────────────┐ 88│ Program-Status Word │ └─────────────────────────────────────────────────────────┘ 63 In a Branch State Entry ┌────────────────────────────┬─┬──────────────────────────┐ 9 │ │A│ Branch Address │ └────────────────────────────┴─┴──────────────────────────┘ 32 63 In a Program-Call State Entry ┌────────────────────────────┬────────┬───────────────────┐ 9 │ Called-Space ID │ │Program-Call Number│ └────────────────────────────┴────────┴───────────────────┘ 32 63 ┌─────────────────────────────────────────────────────────┐ 98│ Modifiable Area │ └─────────────────────────────────────────────────────────┘ 63 ┌─────────────────────────────────────────────────────────┐ A │ Entry Descriptor │ └─────────────────────────────────────────────────────────┘ 63 Byte.Bit 90.32

36

Meaning (A) Addressing mode (in branch state entry)

ESA/390 Reference Summary

Trapping Trap Control Block Byte (Hex) ┌─────────────────────────────────────────────────────────┐ │ │ / / 8│ │ └─────────────────────────────────────────────────────────┘ 31 ┌─┬───────────────────────────────────────────────────┬───┐ C│ │ Trap-Save-Area Address │ │ └─┴───────────────────────────────────────────────────┴───┘ 1 28 31 ┌─────────────────────────────────────────────────────────┐ 1 │ │ └─────────────────────────────────────────────────────────┘ 31 ┌─┬───────────────────────────────────────────────────────┐ 14│ │ Trap-Program Address │ └─┴───────────────────────────────────────────────────────┘ 1 31 ┌─────────────────────────────────────────────────────────┐ 18│ │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 1C│/////////////////////////////////////////////////////////│ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ 2 │ │ / / 3C│ │ └─────────────────────────────────────────────────────────┘ 31 Byte.Bit ///

Meaning Available for programming

37

Trapping (Cont'd)

Trap Save Area Byte (Hex) ┌───────────────────────Trap Flags────────────────────────┐ ┌─┬─┬────────────────────┬──┬─────────────────────────────┐ │E│W│ Zeros │IL│ Zeros │ └─┴─┴────────────────────┴──┴─────────────────────────────┘ 1 2 13 15 31 ┌─────────────────────────────────────────────────────────┐ 4│ Zeros │ ├─┬───────────────────────────────────────────────────────┤ 8│ │ Second-Operand Address of TRAP4 │ ├─┴───────────────────────────────────────────────────────┤ C│ Access Register 15 │ └─────────────────────────────────────────────────────────┘ 31 ┌──────────────────────PSW Values─────────────────────────┐ ┌─┬─┬───┬────────────┬─┬─┬─┬─┬──┬──┬────┬─────────────────┐ 1 │ │ │ │ │ │ │ │ │ │ │Prog│ │ │ │U│ │ UUUU UUU │1│U│W│P│AS│CC│Mask│ │ ├─┼─┴───┴────────────┴─┴─┴─┴─┴──┴──┴────┴─────────────────┤ 14│A│ Instruction Address │ └─┴───────────────────────────────────────────────────────┘ 1 2 5 12 14 16 18 2 24 31 ┌─────────────────────────────────────────────────────────┐ 18│ Zeros │ ├─────────────────────────────────────────────────────────┤ 1C│ Zeros │ ├─────────────────────────────────────────────────────────┤ 2 │ │ / General Registers -15 / 5C│ │ ├─────────────────────────────────────────────────────────┤ 6 │ │ / Unchanged / 9C│ │ ├─────────────────────────────────────────────────────────┤ A │/////////////////////////////////////////////////////////│ ├─────────────────────────────────────────────────────────┤ A4│/////////////////////////////////////////////////////////│ ├─────────────────────────────────────────────────────────┤ A8│ │ / Unchanged / FC│ │ └─────────────────────────────────────────────────────────┘ 31 Byte.Bit 0.0 0.1 0.13-14 10-17 /// U

38

Meaning (E) TRAP was target of EXECUTE (W) TRAP is TRAP4 (not TRAP2) (IL) Instruction-length code PSW values (see PSW on page 29) Available for programming Unpredictable

ESA/390 Reference Summary

Trace-Entry Formats 31-Bit Branch ┌─┬──────────────────────────┐ │1│ Branch Address │ └─┴──────────────────────────┘ 1 31

24-Bit Branch ┌────────┬───────────────────┐ │ │ Branch Address │ └────────┴───────────────────┘ 8 31

Branch in Subspace Group (if ASN Tracing On) ┌────────┬─┬─────────────────┬─┬────────────────────────────┐ │ 1 1│P│Bits 9-31 of ALET│A│ Branch Address │ └────────┴─┴─────────────────┴─┴────────────────────────────┘ 8 32 63

Set Secondary ASN ┌────────┬────────┬──────────┐ │ 1 │ │ New SASN │ └────────┴────────┴──────────┘ 8 16 31

Program Call ┌────────┬────┬──────────────┬─┬──────────────────────────┬─┐ │ │PSW │ │ │ │ │ │ 1 1│Key │ PC Number │A│Bits 1-3 of Return Addr. │P│ └────────┴────┴──────────────┴─┴──────────────────────────┴─┘ 8 12 32 63

Program Transfer ┌────────┬────┬────┬─────────┬──────────────────────────────┐ │ │PSW │ │ │ │ │ 11 1│Key │ │New PASN │ R before │ └────────┴────┴────┴─────────┴──────────────────────────────┘ 8 12 16 32 63

Program Return ┌────────┬────┬────┬─────────┬─┬──────────────────────────┬─┐ │ │PSW │ │ │ │ │ │ │ 11 1 │Key │ │New PASN │A│Bits 1-3 of Return Addr. │P│ └────────┴────┴────┴─────────┴─┴──────────────────────────┴─┘ 8 12 16 32 63 ┌─┬──────────────────────────┐ │A│Updated Instruction Addr. │ └─┴──────────────────────────┘ 64 95

Trace ┌────┬────┬────────┬────────────────────────────────────────┐ │ 111│ N │ │ Bits 16-63 of TOD Clock │ └────┴────┴────────┴────────────────────────────────────────┘ 4 8 16 63 ┌────────────────────────────┬──────────────/───────────────┐ │ Trace Operand │ (R )-(R ) │ └────────────────────────────┴──────────────/───────────────┘ 64 96 95+32(N+1) Bit 4-7

Meaning (N) One less than the number of registers in the trace entry.

39

Machine-Check Interruption Code At real-storage locations 232-239 (E8-EF hex) ┌─────┬─┬───────┬───────┬─┬───┬─┬───────────────┬─┬─┬───────┬─┬─┐ │S P S│ │C E V D│ C S C│ │V │ │S S K D W M P I│F│ │E F G C│ │S│ │D D R│ │D D F G│W P P K│ │S B│ │E C E S P S M A│A│ │C P R R│ │T│ └─────┴─┴───────┴───────┴─┴───┴─┴───────────────┴─┴─┴───────┴─┴─┘ 4 8 13 16 24 26 31 ┌─────┬─────────┬─────┬─┬─┬─┬───┬───────────────────────────────┐ │I A D│ │ │X│A│ │C C│ │ │E R A│ │ │F│P│ │T C│ │ └─────┴─────────┴─────┴─┴─┴─┴───┴───────────────────────────────┘ 32 35 4 43 46 48 63 Bit 0 1 2 4 5 6 7 8 9 10 11 13 14 16 17 18 19 20 21 22 23 24 26 27 28 29 31 32 33 34 43 44 46 47

Meaning (SD) System damage (PD) Instruction-processing damage (SR) System recovery (CD) Timing-facility damage (ED) External damage (VF) Vector-facility failure (DG) Degradation (W) Warning (CP) Channel report pending (SP) Service-processor damage (CK) Channel-subsystem damage (VS) Vector-facility source (B) Backed up (SE) Storage error uncorrected (SC) Storage error corrected (KE) Storage-key error uncorrected (DS) Storage degradation (WP) PSW-MWP validity (MS) PSW mask and key validity (PM) PSW program-mask and condition-code validity (IA) PSW-instruction-address validity (FA) Failing-storage-address validity (EC) External-damage-code validity (FP) Floating-point-register validity (GR) General-register validity (CR) Control-register validity (ST) Storage logical validity (IE) Indirect storage error (AR) Access-register validity (DA) Delayed-access exception (XF) Extended-floating-point-register validity (AP) Ancillary report (CT) CPU-timer validity (CC) Clock-comparator validity

External-Damage Code At real-storage address 244-247 (F4-F7 hex) ┌───────────────┬───┬───────────┬───────────────┬───────────────┐ │ │X X│ │ │ │ │ │N F│ │ │ │ └───────────────┴───┴───────────┴───────────────┴───────────────┘ 8 1 16 24 31 Bit 8 9

40

Meaning (XN) Expanded storage not operational (XF) Expanded-storage control failure

ESA/390 Reference Summary

Operation-Request Block (ORB) Word ┌───────────────────────────────────────────────────────┐ │ Interruption Parameter │ ├────┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬─┬────────────┬─┬─────────┬─┤ 1│Key │S│C│M│Y│F│P│I│A│U│ │H│T│ LPM │L│ │X│ ├─┬──┴─┴─┴─┴─┴─┴─┴─┴─┴─┴─┴─┴─┴────────────┴─┴─────────┴─┤ 2│ │ Channel-Program Address │ ├─┴──────────┬───────────────┬────────────┬─────────────┤ 3│CSS Priority│ Reserved │CU Priority │ Reserved │ ├────────────┴───────────────┴────────────┴─────────────┤ 4│ Reserved │ ├───────────────────────────────────────────────────────┤ 5│ Reserved │ ├───────────────────────────────────────────────────────┤ 6│ Reserved │ ├───────────────────────────────────────────────────────┤ 7│ Reserved │ └───────────────────────────────────────────────────────┘ 8 16 24 31 Word.Bit 1.0-3 1.4 1.5 1.6 1.7 1.8 1.9 1.10 1.11 1.12 1.14 1.15 1.16-23 1.24 1.31 | 3.0-7 | 3.16-23

Meaning (Key) Subchannel key (S) Suspend control (C) Streaming-mode control (M) Modification control (Y) Synchronization control (F) CCW-format control (P) Prefetch control (I) Initial-status-interruption control (A) Address-limit-checking control (U) Suppress-suspended-interruption control (H) Format-2-IDAW control (T) 2K-IDAW control (LPM) Logical-path mask (L) Incorrect-length-suppression mode (X) ORB-extension control Channel-subsystem priority Control-unit priority

Channel-Command Word (CCW) Format-0 CCW ┌──────────────┬──────────────────────────────────────────┐ │ Command Code │ Data Address │ └──────────────┴──────────────────────────────────────────┘ 8 31 ┌────────────┬─┬─────────────┬────────────────────────────┐ │ Flags │ │ │ Byte Count │ └────────────┴─┴─────────────┴────────────────────────────┘ 32 4 48 63 Bit 32 33 34 35 36 37 38

Meaning (CD) Causes use of data-address portion of next CCW (CC) Causes use of command code and data address of next CCW (SLI) Causes suppression of possible incorrect-length indication (Skip) Suppresses transfer of information to main storage (PCI) Causes an intermediate-interruption condition to occur (IDA) Causes bits 8-31 of CCW to specify location of first IDAW (Suspend) Causes suspension before execution of this CCW

41

Channel-Command Word (CCW) (Cont'd)

Format-1 CCW ┌──────────────┬───────────┬─┬────────────────────────────┐ │ Command Code │ Flags │ │ Byte Count │ └──────────────┴───────────┴─┴────────────────────────────┘ 8 16 31 ┌─┬───────────────────────────────────────────────────────┐ │ │ Data Address │ └─┴───────────────────────────────────────────────────────┘ 32 63 Bit 8 9 10 11 12 13 14

Meaning (CD) Causes use of data-address portion of next CCW (CC) Causes use of command code and data address of next CCW (SLI) Causes suppression of possible incorrect-length indication (Skip) Suppresses transfer of information to main storage (PCI) Causes an intermediate-interruption condition to occur (IDA) Causes bits 8-31 of CCW to specify location of first IDAW (Suspend) Causes suspension before execution of this CCW

Indirect-Data-Address Word (IDAW) Format-1 IDAW ┌─┬───────────────────────────────────────────────────────┐ │ │ Data Address │ └─┴───────────────────────────────────────────────────────┘ 1 31

Format-2 IDAW ┌─────────────────────────────────────────────────────────┐ │ Bits -31 of Data Address │ └─────────────────────────────────────────────────────────┘ 31 ┌─────────────────────────────────────────────────────────┐ │ Bits 32-63 of Data Address │ └─────────────────────────────────────────────────────────┘ 32 63

42

ESA/390 Reference Summary

Subchannel-Information Block (SCHIB)

| | | |

Word ┌─────────────────────────────────────────────────────────┐ │ │ 1│ │ 2│ │ 3│ Path-Management-Control Word │ 4│ │ 5│ │ 6│ │ ├─────────────────────────────────────────────────────────┤ 7│ │ 8│ Subchannel-Status Word │ 9│ │ ├─────────────────────────────────────────────────────────┤ 1 │ Model-Dependent Area / │ 11│ Measurement-Block Address │ ├─────────────────────────────────────────────────────────┤ 12│ Model-Dependent Area │ └─────────────────────────────────────────────────────────┘ *See “Subchannel-Status Word (SCSW)” on page 44.

Path-Management-Control Word (PMCW)

| |

┌─────────────────────────────────────────────────────────┐ │ Interruption Parameter │ ├──┬─────┬─────┬─┬──┬──┬─┬─┬─┬────────────────────────────┤ 1│ │ ISC │ │E│LM│MM│D│T│V│ Device Number │ ├──┴─────┴─────┼─┴──┴──┴─┴─┴─┼─────────────┬──────────────┤ 2│ LPM │ PNOM │ LPUM │ PIM │ ├──────────────┴─────────────┼─────────────┼──────────────┤ 3│ MBI │ POM │ PAM │ ├──────────────┬─────────────┼─────────────┼──────────────┤ 4│ CHPID- │ CHPID-1 │ CHPID-2 │ CHPID-3 │ ├──────────────┼─────────────┼─────────────┼──────────────┤ 5│ CHPID-4 │ CHPID-5 │ CHPID-6 │ CHPID-7 │ ├──────────────┼─────────────┼─────────────┼────────┬─┬─┬─┤ 6│ │ │ │ │F│X│S│ └──────────────┴─────────────┴─────────────┴────────┴─┴─┴─┘ 8 16 24 31 Word.Bit 1.2-4 1.8 1.9-10

1.11-12

1.13 1.14 1.15 2.0-7 2.8-15 2.16-23 2.24-31 3.0-15 3.16-23 3.24-31 4.0-7 | 6.29 | 6.30 6.31

Meaning (ISC) Interruption-subclass code (E) Subchannel enabled (LM) limit mode 00 No Checking 01 Data address must be ≥ limit 10 Data address must be < limit 11 Reserved (MM) Measurement-mode enable 00 Neither mode enabled 01 Device-connect-time-measurement enabled 10 Measurement-block-update enabled 11 Both modes enabled (D) Multipath mode (T) Timing facility available (V) Device number valid (LPM) Logical-path mask (PNOM) Path-not-operational mask (LPUM) Last-path-used mask (PIM) Path-installed mask (MBI) Measurement-block index (POM) Path-operational mask (PAM) Path-available mask (CHPID-0) Channel-path ID for logical path 0 (typical) (F) Measurement-block-format control (X) Extended-measurement-word-mode enable (S) Concurrent sense

43

Interruption-Response Block (IRB)

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Word ┌─────────────────────────────────────────────────────────┐ │ │ 1│ Subchannel-Status Word │ 2│ │ ├─────────────────────────────────────────────────────────┤ 3│ │ 4│ │ 5│ Extended-Status Word │ 6│ │ 7│ │ ├─────────────────────────────────────────────────────────┤ 8│ │ / Extended-Control Word │ 15│ │ ├─────────────────────────────────────────────────────────┤ 16│ │ / Extended-Measurement Word │ 23│ │ └─────────────────────────────────────────────────────────┘

Subchannel-Status Word (SCSW) ┌─────────Subchannel Control────────┐ ┌────┬─┬─┬──┬─┬─┬─┬─┬─┬─┬─┬─┬─┬───┬─────────────┬─────────┐ │Key │S│L│CC│F│P│I│A│U│Z│E│N│O│FC │ AC │ SC │ └────┴─┴─┴──┴─┴─┴─┴─┴─┴─┴─┴─┴─┴───┴─────────────┴─────────┘ 4 5 6 8 13 17 2 27 31 ┌─────────────────────────────────────────────────────────┐ 1│ CCW Address │ ├─────────────┬──────────────┬────────────────────────────┤ 2│Device Status│Subchan Status│ Byte Count │ └─────────────┴──────────────┴────────────────────────────┘ 8 16 31 Word. Bit 0.0-3 0.4 0.5 0.6-7

Meaning (Key) Subchannel key (S) Suspend control (L) Extended-status-word format (logout stored) CC) Deferred condition code 00 Normal I/O interruption 01 Status in SCSW 10 Reserved 11 Path not operational 0.8 (F) CCW-format control 0.9 (P) Prefetch control 0.10 (I) Initial-status-interruption control 0.11 (A) Address-limit-checking control 0.12 (U) Suppress-suspended-interruption control 0.13 (Z) Zero condition code 0.14 (E) Extended control (information stored in ECW of IRB) 0.15 (N) Path not operational (PNOM nonzero) 0.17-19(FC) Function control 17 (40) start, 18 (20) halt, 19 (10) clear 0.20-26(AC) Activity control 20 (08) resume pending 24 (80) subchannel active 21 (04) start pending 25 (40) device active 22 (02) halt pending 26 (20) suspended 23 (01) clear pending 0.27-31(SC) Status control 27 (10) alert 30 (02) secondary 28 (08) intermediate 31 (01) status pending 29 (04) primary 2.0-15 Device status (0-7), subchannel status (8-15) 0 (80) Attention 8 (80) Prog.-cont. int. 1 (40) Status modifier 9 (40) Incorrect length 2 (20) Control-unit end 10 (20) Program check 3 (10) Busy 11 (10) Protection check 4 (08) Channel end 12 (08) Channel-data check 5 (04) Device end 13 (04) Channel-control check 6 (02) Unit check 14 (02) Interface-control check 7 (01) Unit exception 15 (01) Chaining check

44

ESA/390 Reference Summary

Interruption-Response Block (IRB) (Cont'd)

Extended-Status Word (ESW) See chart on page 46 to determine the appropriate ESW format.

Format-0 ESW ┌─────────────────────────────────────────────────────┐ Word │ Subchannel Logout │ ├─────────────────────────────────────────────────────┤ 1│ Extended-Report Word │ ├─────────────────────────────────────────────────────┤ 2│ │ │ Failing-Storage Address │ 3│ │ ├─────────────────────────────────────────────────────┤ 4│ Secondary-CCW Address │ └─────────────────────────────────────────────────────┘

Format-0 ESW Word 0 (Subchannel Logout) ┌─┬─────────┬────────────┬─┬─────┬──┬──┬─┬─┬─┬───┐ │ │ ESF │ LPUM │ │ FVF │SA│TC│D│E│A│SC │ └─┴─────────┴────────────┴─┴─────┴──┴──┴─┴─┴─┴───┘ 1 8 16 22 24 26 28 31 Bit 1-7 8-15 17-21 22-23 24-25 26 27 28 29-31

Meaning (ESF) Extended-status flags (1 key check, 2 measurement-block program check, 3 measurement-block data check, 4 measurement -block protection check, 5 CCW check, 6 IDAW check, 7:0) (LPUM) Last-path-used mask (FVF) Field-validity flags (17 LPUM, 18 TC, 19 SC, 20 device status, 21 CCW address) (SA) Storage-access code (00 access type unknown, 01 read, 10 write, 11 read backward) (TC) Termination code (00 halt signal issued, 01 stop, stack, or normal termination, 10 clear signal issued) (D) Device status check (E) Secondary error (A) I/O-error alert (SC) Sequence code

Format-0 ESW Word 1 (Extended-Report Word) ┌───┬─┬─┬─┬─┬─┬─┬─┬──────┬───────────────────────┐ │ │A│P│T│F│S│C│R│ SCNT │ │ └───┴─┴─┴─┴─┴─┴─┴─┴──────┴───────────────────────┘ 3 8 1 16 31 Bit 3 4 5 6 7 8 9 10-15

Meaning (A) Authorization check (P) Path-verification-required (T) Channel-path timeout (F) Failing-storage-address validity (S) Concurrent sense (C) Secondary-CCW-address validity (R) Failing-storage-address format (zero: 1-31 of word 2; one: words 2 and 3) (SCNT) Concurrent-sense count

Format-1 ESW Word 0* ┌───────────┬────────────┬───────────────────────┐ │ │ LPUM │ │ └───────────┴────────────┴───────────────────────┘ 8 16 31 Bit 8-15

Meaning (LPUM) Last-path-used mask

*Word 1 is the same as word 1 of a format-0 ESW. Words 2, 3, and 4 are zeros.

45

Interruption-Response Block (IRB) (Cont'd)

Format-2 ESW Word 0* ┌───────────┬────────────┬───────────────────────┐ │ │ LPUM │ DCTI │ └───────────┴────────────┴───────────────────────┘ 8 16 31 Bit 8-15 16-31

Meaning (LPUM) Last-path-used mask (DCTI) Device-connect-time interval

Format-3 ESW Word 0* ┌───────────┬────────────┬───────────────────────┐ │ │ LPUM │ Unpredictable │ └───────────┴────────────┴───────────────────────┘ 8 16 31 Bit 8-15

Meaning (LPUM) Last-path-used mask

Information Stored in ESW Subchannel Conditions under which ESW Is Stored by Test Subchannel Instruction SubchannelPath-ManagementStatus Word Control Word DeviceDeviceConnectConnectTime Time StatusMeasurMeasurControl SusmentmentField penTimingModeMode L ded Facility Enable Active AIPSX Bit Bit Bit Bit ----0 * * * No/Yes

ExtendedStatus Word (ESW)

Format U

Contents Word 0 Byte 0123 ****

**001 **1*1 10011

1 1 1

* * *

* * *

* * *

No/Yes No/Yes No/Yes

0 0 0

RRRR RRRR RRRR

00001 00011 100*1

0 0 0

* * *

* * *

* * *

No/Yes No/Yes No/Yes

U 3 3

**** ZM** ZM**

**1*1 **1*1 **1*1 **1*1

0 0 0 0

* * * *

0 1 1 1

* 0 1 1

No/Yes No/Yes No Yes

1 1 1 2

ZMZZ ZMZZ ZMZZ ZMDD

01001 01001 01001 01001 01001

0 0 0 0 0

0 1 1 1 1

* 0 1 1 1

* * 0 1 1

No/Yes No/Yes No/Yes No Yes

U 1 1 1 2

**** ZMZZ ZMZZ ZMZZ ZMDD

00011 11001 *1011

1 0 *

Bit * A D

These combinations do not occur.

Meaning Not meaningful. Bits may be zeros or ones. Alert status. Accumulated device-connect-time-interval (DCTI) value stored in bytes 2 and 3. Intermediate status. Extended-status-word format. Last-path-used mask (LPUM) stored in byte 1. Primary status. Subchannel-logout information stored in bytes 0-3. Secondary status. No format defined. Status pending. Bits are stored as zeros.

I L M P R S U X Z

*Word 1 is the same as word 1 of a format-0 ESW. Words 2, 3, and 4 are zeros.

46

ESA/390 Reference Summary

Extended-Control Word (ECW) SCSW Bits 5 14 0 0 0 1

ERW Bit 7 0 1

1 1 1

0 0 1

0 1 1

ERW Bits 10-15 Zeros No. of con-sen* bytes Zeros Zeros No. of con-sen bytes

ECW Words 0-7 Unpredictable Concurrent-sense information* Unpredictable Model-dependent information Concurrent-sense information

*The contents of the ECW are specified by bits 5 and 14 of word 0 of the SCSW. The combination of SCSW bit 5 zero, SCSW bit 14 one, and ERW bit 7 zero does not occur. | | | | | | | | | | | | | | | | | | | |

Extended-Measurement Word

|

Format-0 Measurement Block

Word ┌─────────────────────────────────────────────────────┐ │ Device-Connect Time │ ├─────────────────────────────────────────────────────┤ 1│ Function-Pending Time │ ├─────────────────────────────────────────────────────┤ 2│ Device-Disconnect Time │ ├─────────────────────────────────────────────────────┤ 3│ Control-Unit-Queuing Time │ ├─────────────────────────────────────────────────────┤ 4│ Device-Active-Only Time │ ├─────────────────────────────────────────────────────┤ 5│ Device-Busy Time │ ├─────────────────────────────────────────────────────┤ 6│ Initial-Command-Response Time │ ├─────────────────────────────────────────────────────┤ 7│ Reserved │ └─────────────────────────────────────────────────────┘ 31

Word ┌──────────────────────────┬──────────────────────────┐ │ SSCH + RSCH Count │ Sample Count │ ├──────────────────────────┴──────────────────────────┤ 1│ Device-Connect Time │ ├─────────────────────────────────────────────────────┤ 2│ Function-Pending Time │ ├─────────────────────────────────────────────────────┤ 3│ Device-Disconnect Time │ ├─────────────────────────────────────────────────────┤ 4│ Control-Unit-Queuing Time │ ├─────────────────────────────────────────────────────┤ 5│ Device-Active-Only Time │ ├─────────────────────────────────────────────────────┤ | 6│ Device-Busy Time │ | ├─────────────────────────────────────────────────────┤ | 7│ Initial-Command-Response Time │ └─────────────────────────────────────────────────────┘ 16 31

47

| | | | | | | | | | | | | | | | | | | | | | | | | |

Format-1 Measurement Block Word ┌─────────────────────────────────────────────────────┐ │ SSCH+RSCH Count │ ├─────────────────────────────────────────────────────┤ 1│ Sample Count │ ├─────────────────────────────────────────────────────┤ 2│ Device-Connect Time │ ├─────────────────────────────────────────────────────┤ 3│ Function-Pending Time │ ├─────────────────────────────────────────────────────┤ 4│ Device-Disconnect Time │ ├─────────────────────────────────────────────────────┤ 5│ Control-Unit-Queuing Time │ ├─────────────────────────────────────────────────────┤ 6│ Device-Active-Only Time │ ├─────────────────────────────────────────────────────┤ 7│ Device-Busy Time │ ├─────────────────────────────────────────────────────┤ 8│ Initial-Command-Response Time │ ├─────────────────────────────────────────────────────┤ 9│ │ / Reserved / 15│ │ └─────────────────────────────────────────────────────┘ 31

Channel-Report Word (CRW) ┌─┬─┬─┬─┬────┬─┬─┬─────────┬──────────────────────────┐ │ │S│R│C│RSC │A│ │ ERC │ Reporting-Source ID │ └─┴─┴─┴─┴────┴─┴─┴─────────┴──────────────────────────┘ 4 8 1 16 31 Bit 1 2 3 4-7 8 10-15 16-31

Meaning (S) Solicited CRW (R) Overflow (one or more CRWs lost) (C) Chaining (meaningless if bit 2 is one) (RSC) Reporting-source code (see Reporting-Source table) (A) Ancillary report (ERC) Error-recovery code (see Error-Recovery-Code table) Reporting-source ID (see Reporting-Source table)

Error-Recovery Codes ERC 000001 000010 000011 000100 000101 000110 000111 001000

48

Condition Available Initialized Temporary error Installed parameters initialized Terminal Permanent error with facility not initialized Permanent error with facility initialized Installed parameters modified

ESA/390 Reference Summary

Reporting Source The reporting-source-ID format depends on the RSC field of the channel-report word, as follows: RSC 0010 0011 0100 1001 1011

Reporting Source Monitoring facility Subchannel Channel path Configuration-alert facility Channel subsystem

Reporting-Source ID 00000000 00000000 XXXXXXXX XXXXXXXX 00000000 YYYYYYYY 00000000 YYYYYYYY 00000000 00000000

X = Subchannel number Y = Channel-path ID (CHPID)

I/O Command Codes Standard Command-Code Assignments (CCW Bits 0-7) ─────────────────────────┬────────────────────────────────── xxxx Invalid Command│ mmmm 1 Sense mmmm mm 1 Write │ 1 --Basic Sense mmmm mm1 Read │ 111 1 --Sense ID 1 --Read Ipl │ xxxx 1 Transfer in Channel (a) mmmm mm11 Control │ 1 Transfer in Channel (b) 11 --Control No │ mmmm 1 Invalid Command (c) operation │ mmmm 11 Read Backward ─────────────────────────┴────────────────────────────────── x -- Bit Ignored m -- Modifier bit for specific type of I/O device

a Format- CCW b Format-1 CCW c Format-1 CCW and nonzero m bit

Standard Meanings of Bits of First Sense Byte ────────────────────────────────┬─────────────────────────── Bit Designation │ Bit Designation │ Command reject │ 4 Data check 1 Intervention required │ 5 Overrun 2 Bus-out check │ 6 (Device dependent) 3 Equipment check │ 7 (Device dependent) ────────────────────────────────┴───────────────────────────

Console Printer Channel Commands ────────────────────────────────┬─────────────────────────── Write, No Carrier Return 1│ Sense 4 Write, Auto Carrier Return 9│ Audible Alarm B Read Inquiry A│ No Operation 3 ────────────────────────────────┴───────────────────────────

49

Printer Channel Commands (Cont'd)

Printer Channel Commands ──────────────────────────────────────┬────────────────────────────────────────── COMMANDS VALID FOR ALL PRINTERS │IMPACT PRINTERS ─ ADDITIONAL COMMANDS (Except 38 ─3, ─6 when in Page Mode) │ │Printer Column Reference No Operation 3 │14 3─N1 A GA24─3312 Space 1 Line Immediate B │32 3─5 B GA33─1529 Space 2 Lines Immediate 13 │3211 B GA24─3543 Space 3 Lines Immediate 1B │4248─13211 mode B GA24─3927 Block Data Check 73 │4248─23211 mode B GA24─3991 Allow Data Check 7B │3262─53262─1 mode C GA24─3936 Skip to Channel 1 Immediate 8B │4245─1 C GA33─1541 Skip to Channel 2 Immediate 93 │4245─12, ─2 C GA33─1579 Skip to Channel 3 Immediate 9B │3262─54248 mode D GA24─3936 Skip to Channel 4 Immediate A3 │4248─1native mode D GA24─3927 Skip to Channel 5 Immediate AB │4248─2native mode D GA24─3991 Skip to Channel 6 Immediate B3 │6262─ 14 D GA24─4234 Skip to Channel 7 Immediate BB │ Skip to Channel 8 Immediate E3 │Use Column A, B, C, or D. ABCD Skip to Channel 9 Immediate CB │Unfold 23 .XXX Skip to Channel 1 Immediate D3 │Execute Order 33 ...X Skip to Channel 11 Immediate DB │Fold 43 .XXX Skip to Channel 12 Immediate F3 │Load Forms Control Buffer 63 .XXX │Raise Cover ┌─6B .12 Write Without Spacing 1 │Signal Attention └─6B . 3 Write and Space 1 Line 9 │Skip to Channel Immediate 83 .4.2 Write and Space 2 Lines 11 │Clear Printer 87 ..XX Write and Space 3 Lines 19 │UCS Gate Load EB X... Write and Skip to Channel 1 89 │Load UCS Buffer and Fold ┌─F3 X.. Write and Skip to Channel 2 91 │Verify Band ID └─F3 ..X Write and Skip to Channel 3 99 │Load UCS Buffer (No Fold) ┌─FB XXX Write and Skip to Channel 4 A1 │Verify Band ID └─FB X Write and Skip to Channel 5 A9 │ Write and Skip to Channel 6 B1 │Release CU and Device ┌─14 5.. Write and Skip to Channel 7 B9 │Sense Intermediate Buffer └─14 ..X Write and Skip to Channel 8 C1 │Release CU, Reserve Device 34 5... Write and Skip to Channel 9 C9 │Reserve CU, Release Device 54 5... Write and Skip to Channel 1 D1 │Reserve CU and Device 74 5... Write and Skip to Channel 11 D9 │Release Device 94 5... Write and Skip to Channel 12 E1 │Reserve Device B4 5... │Release CU D4 5... Basic Sense 4 │Sense ID E4 ..XX ──────────────────────────────────────┤Reserve CU F4 5... │ 38 ─3, ─6 PAGE MODE COMMANDS │ (See Note Y) │Read Band ID ┌─ A . X │ │ No Operation 3 │Diagnostic Read PLB │ 2 XX62 Load Font Index F │Diagnostic Write │ 5 7862 Load Font Control 1F │Diagnostic Check Read │ 6 XXX2 Load Font 2F │Diagnostic Gate │ 7 .XX2 Execute Order Any State 33 │Diagnostic Read UCS Buffer └─ A .XX Load Font Equivalence 3F │Diagnostic Read FCB 12 .XXX Delete Font 4F │ Begin Page Segment 5F │X = Valid . = Invalid Delete Page Segment 6F │Blank = Not applicable. Include Page Segment 7F │ Execute Order Home State 8F │1 = No action occurs (except 3211). Set Home State 97 │2 = No action occurs. Load Copy Control 9F │3 = No action occurs on 3265─5. Begin Page AF │4 = 3211 only (no action occurs on 4248 End Page BF │ 3211 mode. Load Page Description CF │5 = Two─channel switch feature only. Begin Overlay DF │6 = No action occurs (except 4245). Delete Overlay EF │7 = 14 3─N1 also uses command codes D, 15, │ 1D, 8D, 95, 9D, A5, AD, B5, BD, C5, CD, Write Factored Text Control D │ D5, DD, and E5. Write Text 2D │8 = 3211 and 4248 3211 mode only. Write Image Control 3D ├──────────────────────────────────────────── Write Image 4D │38 ─ Additional Commands End 5D │(Except 38 ─3,─6 when in Page Mode; Load Page Position 6D │ see Note X). │End of Transmission 7 Basic Sense 4 │Mark Form 17 Sense Intermediate Buffer 14 │Load Copy Number 23 Sense Error Log 24 │Execute Order Any State 33 Sense ID E4 │Initialize Printer 37 ──────────────────────────────────────┤Load Forms Overlay Seq Control 43 38 ─1 Reference: GA26─1635 │Select Translate Table 47 38 ─3, ─6 Reference: GA32─ 5 │Load Writable Char Gen Module 53 │Select Translate Table 1 57 Note X: For 38 ─3, ─6 only, Set Home │Load Forms Control Buffer 63 State (97) command will be accepted, │Select Translate Table 2 67 but with command retry; the retry will│Select Translate Table 3 77 succeed because Page Mode will have │Load Translate Table 83 been sent. │Clear Printer 87 │ Note Y: Other 38 ─3, ─6 commands │Load Graphic Char Modification 25 accepted, but with command retry; the │Load Copy Modification 35 retry will succeed because Page Mode │Sense Intermediate Buffer 14 will have been reset. │Sense Error Log 24 │Sense ID E4 ──────────────────────────────────────┴────────────────────────────────────────────

50

ESA/390 Reference Summary

Magnetic-Tape Channel Commands Channel Command No Operation Rewind Rewind Unload Modeset-1 (200/Odd/DC) Erase Gap Request Track-In-Error Write Tape Mark Modeset-1 (200/Even/Normal) Backspace Block Modeset-1 (200/Even/TR) Backspace File Modeset-1 (200/Odd/Normal) Forward Space Block Modeset-1 (200/Odd/TR) Forward Space File Synchronize Locate Block Modeset-1 (556/Odd/DC) Suspend Multipath Reconnection Modeset-1 (556/Even/Normal) Modeset-1 (556/Even/TR) Modeset-1 (556/Odd/Normal) Modeset-1 (556/Odd/TR) Modeset-1 (800/Odd/DC) Data Security Erase Load Display Modeset-1 (800/Even/Normal) Modeset-1 (800/Even/TR) Set Path Group ID Modeset-1 (800/Odd/Normal) Assign Modeset-1 (800/Odd/TR) Modeset-2 (1 600 bpi PE) Set Tape- Write-Immediate Unassign Modeset-2 (800 bpi NRZI) Modeset-2 (6250 bpi GCR) Mode Set Control Access

Hex Code 03 07 0F 13 17 1B 1F 23 27 2B 2F 33 37 3B 3F 43 4F 53 5B 63 6B 73 7B 93 97 9F A3 AB AF B3 B7 BB ┌C3 └C3 C7 CB D3 DB E3

3420-3 3420-5 3420-7 X X X (a) X X X (a) X (a) X (a) X (a) X

3420-4 3420-6 3420-8 X X X (b) X X X (b) X (b) X (b) X (b) X

(d)

(b)

(d) (d) (d) (d) (d) X

(b) (b) (b) (b) (b) X

(d) (d)

(b) (b)

(d)

(b)

(d) (e) -

(b) (f) -

X -

(e)

(b) (f)

X

3422 3430 X X X X (c) X X X X X

X

3480 X X X (b) X X (b) X (b) X (b) X (b) X X X (b) (b) (b) (b) (b) (b) (b) X X (b) (b) X (b) X (b) X X (b) (b) X X

Write

01

X

X

X

X

Read Read Buffer Read Block ID

02 12 22

X

X

X

X X X

Read Backward

OC

X

X

X

X

Basic Sense Read Buffered Log Sense Path Group ID Release Sense ID Reserve

04 24 34 D4 E4 F4

X

X

X

X X X

(g)

(g)

(g)

(g)

(g) X (g)

Diagnostic Mode Set Set Diagnose Loop Write-To-Read

OB 4B 8B

X X X

X X X

(c) X

X

Notes: a No action occurs unless 7-track feature is installed; if present, density set is 200 bpi by 3803-2 Tape control, 556 bpi by 3803-1. b Valid command, but no action occurs. c Invalid command for 3422. d No action occurs unless 7-track feature is installed. e No action occurs unless 800 bpi density feature is installed. f No action occurs unless 1600 bpi density feature is installed. g Requires two-channel switch feature, invalid for 3430. For hex C3, the meaning depends on the machine type; hyphens signify that the alternative meaning is used. Modeset-1 command (for 7-track drives): density (200, 556, 800 bpi)/parity (even, odd)/mode (Normal, DC=data converter, TR=translator). Modeset-2 command (for 9-track drives): density (800, 1600, 6250 bpi). Sources: 3420-3, -5, -7(GA32-0020) 3420-4, -6, -8(GA32-0021)

3422(GA32-0089) 3430(GA32-0076)

3480(GA32-0042)

51

DASD Channel Commands Channel Command Control No Operation Seek Seek Cylinder Space Count Recalibrate (No Op on 2305-2) Restore (executed as No-Op) Seek Head Set File Mask Set Sector (3340 RPS is optional) Vary Sensing Perform Subsystem Function Orient (No-Op on 2305-2) Set High Performance Storage Limits Locate Locate Record Suspend Multipath Reconnection Define Extent Set Subsystem Mode Set Paging Parameters Discard Block Set Path Group ID Search Search Key Equal (*A9) Search ID Equal (*B1) Search Home Address Equal (*B9) Search Key High (*C9) Search ID High (*D1) Search Key Equal or High (*E9) Search ID Equal or High (*F1) Read Read Initial Program Load Read Data (*86) Read Key & Data (*BE) Read Count (*92) Read Record Zero (*96) Read Home Address (*9A) Read Count Key & Data (*9E) Read Sector (3340 RPS is optional) Read Subsystem Data Read Read Message ID Read Multiple Count Key & Data Read Track Read Configuration Data Write Write Special Count Key & Data Write Data Write Key & Data Erase Write Record Zero Write Home Address Write Count Key & Data Write Write Update Data Write Update Key & Data Write Count Key & Data Next Track

2305 1

3330 3340 3350 2

03 07 0B 0F 13

X X X X X

X X X X X

17 1B 1F 23

X X X X

X X X X

27 27 2B 3B

X

Hex Code

X X X

X X

3380 5

3370 6

X X X X X

X X X X X

X

X X X X

X X X X

None 6 1 1

(u)

1 Variable None 10

(a)

43 47 5B 63 87 8B 8F AF

Typical Transfer Count

3375 3380 4

X

None 6 6 3 None

X

8 16 None

X

X

16 2 10 2+(5xn) 12

X X X

X X X

KL 5 4

(b) (d)

(c) X

(b)

X (r)

(d)

(e) X X

29 31 39

X X X

X X X

49 51 69

X X X

X X X

X X X

X X X

KL 5 KL

71

X

X

X

X

5

02 06 0E 12 16 1A 1E

X X X X X X X

X X X X X X X

X X X X X X X

X X X X X X X

22

X

X

3E 42 4E 5E

X

X

X

X

X X

(f)

X

DE FA

(v) X (t) (u)

01

X

X

05 0D 11 15 19 1D 41 85 8D 9D

X X X X X X

X X X X X X

ESA/390 Reference Summary

Variable 512xn 11 nx(8+KL+ DL) Variable 256 8+KL+DL

X

X X X X X X

X X X X X X

(b) (b) (b)

(c) (c) (c)

4

5

X

2

DL or 512 DL KL+DL 8 8+KL+DL 5 8+KL+DL 1

(u)

1

52

3350 3

3

6

DL KL+DL 8+KL+DL 8+KL+DL 5, 7, or 11 8+KL+DL 512xn DL KL+DL 8+KL+DL

DASD Channel Commands (Cont'd)

Channel Command Sense Basic Sense Unconditional Reserve (g) Read Buffered Log Sense Path Group ID Reset Allegiance Sense Subsystem Status Read Device Characteristics Sense Subsystem Counts Device Release Read and Reset Buffered Log Device Reserve Sense ID (f) Diagnostic Diagnostic Write Home Address Diagnostic Read Home Address Diagnostic Sense # Diagnostic Load Diagnostic Write Diagnostic Sense/Read Diagnostic Control

Hex Code

04 14 24 34 44 54 64 74 94 A4 B4 E4

2305 1 X

e f g h j k m

X (h,j)

3375 3380 4

3380 5

3370 6

X

X (d,h,j)

X X

X (h,j)

(d,h,j) X

X (t) X (c) (s) X X

(h,j) X

24 or 32 24 or 32 128 12 32 40 32 80 24 24 or 32

(d,h,j) X

X X

(h,j) X

24 or 32 7

(d) (k) (j)

(k) (h,j) X

(j)

(h,j) X

Typical Transfer Count

3350 3

X

X

X

09

X

X

27 or 28

0A

X

X

27 or 28

X (q) 4

X X 5

44 53 73 C4 F3

X X X

1

a b c d

3330 3340 3350 2

Valid only for 3880-13 Speed matching buffer feature Not valid for 3880-13 Dynamic path selection (only valid on 3380-AA4, -AD4, -AE4, -AJ4, AK4 strings) Valid only for 3880-21 Not valid for 3330/3333 on ISC-SA; 3830-2, -3, and ISC require 3344/3350 microcode Not valid on ISC-SA; not valid on 3330/3333, 3340/3344 String-switching feature Channel-switching feature Valid only for 3880-11 paging director and 3880-21 Not valid on 3880-21

(m) (m) (m) (p) (q) 2

p q

r s t u v * #

3

X X 6

16 or 512 1 8 or 512 Variable 4+n

Valid only for 3880-1, -2, -11, -21 Valid only for 3330/3350 on 3880-1, -2, and for 3380 on 3880-2, -3 without 3380-speed-matching-buffer feature Valid only for 3880-13, -23, and 3990-3 Valid only for 3880-13, -23 Not valid for 3880-13, -23 Valid only for 3990 Valid only for 3990-3 Multi-track command codes (standard) Also called “Read Diagnostic Status 1”

53

Code Assignments Code Table ───┬───┬────────────────┬───────────────┬───────────────────── │ │ │ AS- ISO (1) │BookMaster Dec│Hex│ EBCDIC │ CII -8 IBM-PC│Symbol Names(2) ───┼───┼────────────────┼───────────────┼───────────────────── │ │ NUL │ NUL NUL NUL │ 1│ 1 │ SOH │ SOH SOH SOH  │face 2│ 2 │ STX │ STX STX STX  │FACE 3│ 3 │ ETX │ ETX ETX ETX ♥ │HEART ───┼───┼────────────────┼───────────────┼───────────────────── 4│ 4 │ SEL │ EOT EOT EOT ♦ │DIAMOND 5│ 5 │ HT │ ENQ ENQ ENQ ♣ │CLUB 6│ 6 │ RNL │ ACK ACK ACK ♠ │SPADE 7│ 7 │ DEL │ BEL BEL BEL  │bullet ───┼───┼────────────────┼───────────────┼───────────────────── 8│ 8 │ GE │ BS BS BS  │revbul 9│ 9 │ SPS │ HT HT HT  │circle 1 │ A │ RPT │ LF LF LF  │revcir 11│ B │ VT │ VT VT VT ♂ │male ───┼───┼────────────────┼───────────────┼───────────────────── 12│ C │ FF │ FF FF FF ♀ │female 13│ D │ CR │ CR CR CR ♪ │note18 14│ E │ SO │ SO SO SO ♫ │note1616 15│ F │ SI │ SI SI SI % │sun ───┼───┼────────────────┼───────────────┼───────────────────── 16│1 │ DLE │ DLE DLE DLE  │rahead 17│11 │ DC1 │ DC1 DC1 DC1  │lahead 18│12 │ DC2 │ DC2 DC2 DC2 & │udarrow 19│13 │ DC3 │ DC3 DC3 DC3 ‼ │dblxclam ───┼───┼────────────────┼───────────────┼───────────────────── 2 │14 │ RES/ENP │ DC4 DC4 DC4 ¶ │par 21│15 │ NL │ NAK NAK NAK § │section 22│16 │ BS │ SYN SYN SYN ¯ │overline 23│17 │ POC │ ETB ETB ETB < │udarrowus ───┼───┼────────────────┼───────────────┼───────────────────── 24│18 │ CAN │ CAN CAN CAN ↑ │uarrow 25│19 │ EM │ EM EM EM ↓ │darrow 26│1A │ UBS │ SUB SUB IFS → │rarrow 27│1B │ CU1 │ ESC ESC ESC ← │larrow ───┼───┼────────────────┼───────────────┼───────────────────── 28│1C │ IFS │ FS IFS DEL [ │lnotusd 29│1D │ IGS │ GS IGS GS ↔ │lrarrow 3 │1E │ IRS │ RS IRS RS ] │uahead 31│1F │ ITB/IUS │ US IUS US ^ │dahead ───┼───┼────────────────┼───────────────┼───────────────────── 32│2 │ DS │ SP SP SP │ 33│21 │ SOS │ ! ! ! │xclam 34│22 │ FS │ " " " │sdq 35│23 │ WUS │ # # # │numsign ───┼───┼────────────────┼───────────────┼───────────────────── 36│24 │ BYP/INP │ $ $ $ │dollar 37│25 │ LF │ % % % │percent 38│26 │ ETB │ & & & │amp 39│27 │ ESC │ ' ' ' │ssq(3) ───┴───┴────────────────┴───────────────┴───────────────────── ──────────────── BookMaster is a trademark of the International Business Machines Corporation.

54

ESA/390 Reference Summary

Code Assignments (Cont'd)

───┬───┬────────────────┬───────────────┬───────────────────── │ │ │ AS- ISO (1) │BookMaster Dec│Hex│ EBCDIC │ CII -8 IBM-PC│Symbol Names(2) ───┼───┼────────────────┼───────────────┼───────────────────── 4 │28 │ SA │ ( ( ( │lpar 41│29 │ SFE │ ) ) ) │rpar 42│2A │ SM/SW │    │asterisk 43│2B │ CSP │ + + + │plus ───┼───┼────────────────┼───────────────┼───────────────────── 44│2C │ MFA │ , , , │comma 45│2D │ ENQ │ – – – │hyphen or minus 46│2E │ ACK │ . . . │period 47│2F │ BEL │ / / / │divslash or slash ───┼───┼────────────────┼───────────────┼───────────────────── 48│3 │ │ │ 49│31 │ │ 1 1 1 │ 5 │32 │ SYN │ 2 2 2 │ 51│33 │ IR │ 3 3 3 │ ───┼───┼────────────────┼───────────────┼───────────────────── 52│34 │ PP │ 4 4 4 │ 53│35 │ TRN │ 5 5 5 │ 54│36 │ NBS │ 6 6 6 │ 55│37 │ EOT │ 7 7 7 │ ───┼───┼────────────────┼───────────────┼───────────────────── 56│38 │ SBS │ 8 8 8 │ 57│39 │ IT │ 9 9 9 │ 58│3A │ RFF │ : : : │colon 59│3B │ CU3 │ ; ; ; │semi ───┼───┼────────────────┼───────────────┼───────────────────── 6 │3C │ DC4 │ < < < │lt 61│3D │ NAK │ ═ ═ ═ │eq 62│3E │ │ > > > │gt 63│3F │ SUB │ ? ? ? │quest ───┼───┼────────────────┴───┬───────────┼───────────────────── Dec│Hex│ See Next Page │ See Above │See Above ───┼───┼────────────────────┼───────────┼───────────────────── 64│4 │SP SP SP SP SP │ @ @ @ │atsign 65│41 │RSP RSP RSP RSP RSP │ A A A │ 66│42 │ â â â │ B B B │ac 67│43 │ ä ä ä │ C C C │ae ───┼───┼────────────────────┼───────────┼───────────────────── 68│44 │ à à à │ D D D │ag 69│45 │ á á á │ E E E │aa 7 │46 │ ã ã ã │ F F F │at 71│47 │ å å å │ G G G │ao ───┼───┼────────────────────┼───────────┼───────────────────── 72│48 │ ç ç ç │ H H H │cc 73│49 │ ñ ñ ñ │ I I I │nt 74│4A │ ¢ ¢ [ ¢ │ J J J │cent, lbrk 75│4B │ . . . . . │ K K K │period ───┼───┼────────────────────┼───────────┼───────────────────── 76│4C │ < < < < < │ L L L │lt 77│4D │ ( ( ( ( ( │ M M M │lpar 78│4E │ + + + + + │ N N N │plus 79│4F │ | | ! | │ O O O │vbar, xclam ───┼───┼────────────────────┼───────────┼───────────────────── 8 │5 │ & & & & & │ P P P │amp 81│51 │ é é é │ Q Q Q │ea 82│52 │ ê ê ê │ R R R │ec 83│53 │ ë ë ë │ S S S │ee ───┴───┴────────────────────┴───────────┴─────────────────────

55

Code Assignments (Cont'd)

───┬───┬────────────────────┬───────────┬───────────────────── │ │ EBCDIC(4) │AS- ISO IBM│BookMaster Dec│Hex│81C 94C 37 5 147│CII -8 -PC│Symbol Names(2) ───┼───┼────────────────────┼───────────┼───────────────────── 84│54 │ è è è │ T T T │eg 85│55 │ í í í │ U U U │ia 86│56 │ î î î │ V V V │ic 87│57 │ ï ï ï │ W W W │ie ───┼───┼────────────────────┼───────────┼───────────────────── 88│58 │ ì ì ì │ X X X │ig 89│59 │ ß ß ß │ Y Y Y │ss 9 │5A │ ! ! ] ! │ Z Z Z │xclam, rbrk 91│5B │ $ $ $ $ │ [ [ [ │dollar, lbrk ───┼───┼────────────────────┼───────────┼───────────────────── 92│5C │      │ \ \ \ │asterisk, bslash 93│5D │ ) ) ) ) ) │ ] ] ] │rpar, rbrk 94│5E │ ; ; ; ; ; │ ^ ^ ^ │semi, hat 95│5F │ ¬ ¬ ^ ^ │ _ _ _ │lnot, hat, us ───┼───┼────────────────────┼───────────┼───────────────────── 96│6 │ - │ ` ` ` │hyphen or minus, │ │ │ │grave 97│61 │ / / / / / │ a a a │divslash or slash 98│62 │    │ b b b │Ac 99│63 │ Ä Ä Ä │ c c c │Ae ───┼───┼────────────────────┼───────────┼───────────────────── 1 │64 │ À À À │ d d d │Ag 1 1│65 │ Á Á Á │ e e e │Aa 1 2│66 │ à à à │ f f f │At 1 3│67 │ Å Å Å │ g g g │Ao ───┼───┼────────────────────┼───────────┼───────────────────── 1 4│68 │ Ç Ç Ç │ h h h │Cc 1 5│69 │ Ñ Ñ Ñ │ i i i │Nt 1 6│6A │ ¦ ¦ ¦ ¦ │ j j j │splitvbar 1 7│6B │ , , , , , │ k k k │comma ───┼───┼────────────────────┼───────────┼───────────────────── 1 8│6C │ % % % % % │ l l l │percent 1 9│6D │ _ _ _ _ _ │ m m m │us 11 │6E │ > > > > > │ n n n │gt 111│6F │ ? ? ? ? ? │ o o o │quest ───┼───┼────────────────────┼───────────┼───────────────────── 112│7 │ ø ø ø │ p p p │os 113│71 │ É É É │ q q q │Ea 114│72 │ Ê Ê Ê │ r r r │Ec 115│73 │ Ë Ë Ë │ s s s │Ee ───┼───┼────────────────────┼───────────┼───────────────────── 116│74 │ È È È │ t t t │Eg 117│75 │ Í Í Í │ u u u │Ia 118│76 │ Î Î Î │ v v v │Ic 119│77 │ Ï Ï Ï │ w w w │Ie ───┼───┼────────────────────┼───────────┼───────────────────── 12 │78 │ Ì Ì Ì │ x x x │Ig 121│79 │ ` ` ` │ y y y │grave 122│7A │ : : : : : │ z z z │colon 123│7B │ # # # # │ { { { │numsign, lbrc ───┼───┼────────────────────┼───────────┼───────────────────── 124│7C │ @ @ @ @ │ | | | │atsign, vbar 125│7D │ ' ' ' ' ' │ } } } │ssq(3), rbrc 126│7E │ ═ ═ ═ ═ ═ │ ∼ ∼ ∼ │eq, eqv 127│7F │ " " " " " │DEL   │sdq, house ───┴───┴────────────────────┴───────────┴─────────────────────

56

ESA/390 Reference Summary

Code Assignments (Cont'd)

───┬───┬────────────────────┬───────────┬───────────────────── │ │ EBCDIC(4) │ISO IBM-PC │BookMaster Dec│Hex│81C 94C 37 5 147│-8 437 85│Symbol Names(2) ───┼───┼────────────────────┼───────────┼───────────────────── 128│8 │ Ø Ø Ø │ Ç Ç │Os, Cc 129│81 │ a a a a a │ ü ü │ue 13 │82 │ b b b b b │ BPH é é │ea 131│83 │ c c c c c │ NBH â â │ac ───┼───┼────────────────────┼───────────┼───────────────────── 132│84 │ d d d d d │ IND ä ä │ae 133│85 │ e e e e e │ NEL à à │ag 134│86 │ f f f f f │ SSA å å │ao 135│87 │ g g g g g │ ESA ç ç │cc ───┼───┼────────────────────┼───────────┼───────────────────── 136│88 │ h h h h h │ HTS ê ê │ec 137│89 │ i i i i i │ HTJ ë ë │ee 138│8A │ « « « │ VTS è è │odqf, eg | 139│8B │ » » » │ PLD ï ï │cdqf, ie ───┼───┼────────────────────┼───────────┼───────────────────── 14 │8C │ ð ð ð │ PLU î î │eth, ic 141│8D │ ý ý ý │ RI ì ì │ya, ig 142│8E │ þ þ þ │ SS2 Ä Ä │thorn, Ae 143│8F │ ± ± ± │ SS3 Å Å │pm, Ao ───┼───┼────────────────────┼───────────┼───────────────────── 144│9 │ ° ° ° │ DCS É É │degree, Ea 145│91 │ j j j j j │ PU1 æ æ │aelig 146│92 │ k k k k k │ PU2 Æ Æ │AElig 147│93 │ l l l l l │ STS ô ô │oc ───┼───┼────────────────────┼───────────┼───────────────────── 148│94 │ m m m m m │ CCH ö ö │oe 149│95 │ n n n n n │ MW ò ò │og 15 │96 │ o o o o o │ SPA û û │uc 151│97 │ p p p p p │ EPA ù ù │ug ───┼───┼────────────────────┼───────────┼───────────────────── 152│98 │ q q q q q │ SOS ÿ ÿ │ye 153│99 │ r r r r r │ Ö Ö │Oe 154│9A │ ª ª ª │ SCI Ü Ü │aus, Ue 155│9B │ º º º │ CSI ¢ ø │ous, cent, os ───┼───┼────────────────────┼───────────┼───────────────────── 156│9C │ æ æ æ │ ST £ £ │aelig, Lsterling 157│9D │ ¸ ¸ ¸ │ OSC ¥ Ø │cedilla, yen, Os 158│9E │ Æ Æ Æ │ PM  × │AElig, peseta, mult 159│9F │ ¤ ¤ ¤ │ ACP ƒ ƒ │currency, fnof(5) ───┼───┼────────────────────┼───────────┼───────────────────── 16 │A │ µ µ µ │ RSP á á │mu(6), aa 161│A1 │ ˜ ˜ ˜ │ ¡ í í │tilde, inve, ia 162│A2 │ s s s s s │ ¢ ó ó │cent, oa 163│A3 │ t t t t t │ £ ú ú │Lsterling, ua ───┼───┼────────────────────┼───────────┼───────────────────── 164│A4 │ u u u u u │ ¤ ñ ñ │currency, nt 165│A5 │ v v v v v │ ¥ Ñ Ñ │yen, Nt 166│A6 │ w w w w w │ ¦ ª ª │splitvbar, aus 167│A7 │ x x x x x │ § º º │section, ous ───┼───┼────────────────────┼───────────┼───────────────────── 168│A8 │ y y y y y │ ¨ ¿ ¿ │umlaut, invq 169│A9 │ z z z z z │ © ’ ® │copyr, lnotrev, regtm 17 │AA │ ¡ ¡ ¡ │ ª ¬ ¬ │inve, aus, lnot 171│AB │ ¿ ¿ ¿ │ « ½ ½ │invq, odqf, frac12 ───┴───┴────────────────────┴───────────┴─────────────────────

57

Code Assignments (Cont'd)

───┬───┬────────────────────┬───────────┬───────────────────── │ │ EBCDIC(4) │ISO IBM-PC │BookMaster Dec│Hex│81C 94C 37 5 147│-8 437 85│Symbol Names(2) ───┼───┼────────────────────┼───────────┼───────────────────── 172│AC │ Ð Ð Ð │ ¬ ¼ ¼ │Dstroke or Eth, lnot, │ │ │ │frac14 173│AD │ Ý Ý [ │SHY ¡ ¡ │Ya, lbrk, inve 174│AE │ Þ Þ Þ │ ® « « │Thorn, regtm, odqf 175│AF │ ® ® ® │ ¯ » » │regtm, overline, cdqf ───┼───┼────────────────────┼───────────┼───────────────────── 176│B │ ^ ¢ ¬ │ ° “ “ │hat, cent, lnot, │ │ │ │degree, box14 177│B1 │ £ £ £ │ ± ” ” │Lsterling, pm, box12 178│B2 │ ¥ ¥ ¥ │ • – – │yen, sup2, box34 179│B3 │ — — — │ ˜ │ │ │smultdot, sup3, bxv ───┼───┼────────────────────┼───────────┼───────────────────── 18 │B4 │ © © © │ ´ ┤ ┤ │copyr, acute, bxrj 181│B5 │ § § § │ µ ╡ Á │section, mu(6), │ │ │ │bx1 12, Aa 182│B6 │ ¶ ¶ ¶ │ ¶ ╢  │par, bx2 21, Ac 183│B7 │ ¼ ¼ ¼ │ — ╖ À │frac14, smultdot, │ │ │ │bx 21, Ag ───┼───┼────────────────────┼───────────┼───────────────────── 184│B8 │ ½ ½ ½ │ ¸ ╕ © │frac12, cedilla, │ │ │ │bx 12, copyr 185│B9 │ ¾ ¾ ¾ │  ╣ ╣ │frac34, sup1, bx2 22 186│BA │ [ ¬ Ý │ º ║ ║ │lbrk, lnot, Ya, ous, │ │ │ │bx2 2 187│BB │ ] | ¨ │ » ╗ ╗ │rbrk, vbar, umlaut, │ │ │ │cdqf, bx 22 ───┼───┼────────────────────┼───────────┼───────────────────── 188│BC │ ¯ ¯ ¯ │ ¼ ╝ ╝ │overline, frac14, │ │ │ │bx2 2 189│BD │ ¨ ¨ ] │ ½ ╜ ¢ │umlaut, rbrk, frac12, │ │ │ │bx2 1, cent 19 │BE │ ´ ´ ´ │ ¾ ╛ ¥ │acute, frac34, │ │ │ │bx1 2, yen 191│BF │ × × × │ ¿ ┐ ┐ │mult, invq, bxur ───┼───┼────────────────────┼───────────┼───────────────────── 192│C │ { { { │ À └ └ │lbrc, Ag, bxll 193│C1 │ A A A A A │ Á ┴ ┴ │Aa, bxbj 194│C2 │ B B B B B │  ┬ ┬ │Ac, bxtj 195│C3 │ C C C C C │ à ├ ├ │At, bxlj ───┼───┼────────────────────┼───────────┼───────────────────── 196│C4 │ D D D D D │ Ä ─ ─ │Ae, bxh 197│C5 │ E E E E E │ Å ┼ ┼ │Ao, bxcj 198│C6 │ F F F F F │ Æ ╞ ã │AElig, bx121 , at 199│C7 │ G G G G G │ Ç ╟ à │Cc, bx212 , At ───┼───┼────────────────────┼───────────┼───────────────────── | 2 │C8 │ H H H H H │ È ╚ ╚ │Eg, bx22 2 1│C9 │ I I I I I │ É ╔ ╔ │Ea, bx 22 2 2│CA │SHY SHY SHY SHY SHY │ Ê ╩ ╩ │Ec, bx22 2 2 3│CB │ ô ô ô │ Ë ╦ ╦ │oc, Ee, bx 222 ───┼───┼────────────────────┼───────────┼───────────────────── 2 4│CC │ ö ö ö │ Ì ╠ ╠ │oe, Ig, bx222 2 5│CD │ ò ò ò │ Í ═ ═ │og, Ia, bx 2 2 2 6│CE │ ó ó ó │ Î ╬ ╬ │oa, Ic, bx2222 2 7│CF │ õ õ õ │ Ï ╧ ¤ │ot, Ie, bx12 2, │ │ │ │currency ───┴───┴────────────────────┴───────────┴─────────────────────

58

ESA/390 Reference Summary

Code Assignments (Cont'd)

───┬───┬────────────────────┬───────────┬───────────────────── │ │ EBCDIC(4) │ISO IBM-PC │BookMaster Dec│Hex│81C 94C 37 5 147│-8 437 85│Symbol Names(2) ───┼───┼────────────────────┼───────────┼───────────────────── 2 8│D │ } } } │ Ð ╨ ð │rbrc, Dstroke or Eth, │ │ │ │bx21 1, eth 2 9│D1 │ J J J J J │ Ñ ╤ Ð │Nt, bx 212, Dstroke │ │ │ │or Eth 21 │D2 │ K K K K K │ Ò ╥ Ê │Og, bx 121, Ec 211│D3 │ L L L L L │ Ó ╙ Ë │Oa, bx21 , Ee ───┼───┼────────────────────┼───────────┼───────────────────── 212│D4 │ M M M M M │ Ô ╘ È │Oc, bx12 , Eg 213│D5 │ N N N N N │ Õ ╒ ı │Ot, bx 21 , idotless 214│D6 │ O O O O O │ Ö ╓ Í │Oe, bx 12 , Ia 215│D7 │ P P P P P │ × ╫ Î │mult, bx2121, Ic ───┼───┼────────────────────┼───────────┼───────────────────── 216│D8 │ Q Q Q Q Q │ Ø ╪ Ï │Os, bx1212, Ie 217│D9 │ R R R R R │ Ù ┘ ┘ │Ug, bxlr 218│DA │    │ Ú ┌ ┌ │sup1, Ua, bxul 219│DB │ û û û │ Û   │uc, Uc, BOX ───┼───┼────────────────────┼───────────┼───────────────────── 22 │DC │ ü ü ü │ Ü   │ue, Ue, BOXBOT 221│DD │ ù ù ù │ Ý ¦ │ug, Ya, BOXLEFT, │ │ │ │splitvbar 222│DE │ ú ú ú │ þ

Ì │ua, thorn, BOXRIGHT, │ │ │ │Ig 223│DF │ ÿ ÿ ÿ │ ß   │ye, ss, BOXTOP ───┼───┼────────────────────┼───────────┼───────────────────── 224│E │ \ \ \ │ à α Ó │bslash, ag, alpha, Oa 225│E1 │ NSP ÷ ÷ ÷ │ á ß ß │div, aa, ss 226│E2 │ S S S S S │ â ┌ Ô │ac, Gamma, Oc 227│E3 │ T T T T T │ ã π Ò │at, pi, Og ───┼───┼────────────────────┼───────────┼───────────────────── 228│E4 │ U U U U U │ ä Σ õ │ae, Sigma, ot 229│E5 │ V V V V V │ å σ Õ │ao, sigma, Ot 23 │E6 │ W W W W W │ æ µ µ │aelig, mu(6) 231│E7 │ X X X X X │ ç τ þ │cc, tau, thorn ───┼───┼────────────────────┼───────────┼───────────────────── 232│E8 │ Y Y Y Y Y │ è Φ Þ │eg, Phi, Thorn 233│E9 │ Z Z Z Z Z │ é Θ Ú │ea, Theta(5), Ua 234│EA │ • • • │ ê Ω Û │sup2, ec, Omega, Uc 235│EB │ Ô Ô Ô │ ë δ Ù │Oc, ee, delta, Ug ───┼───┼────────────────────┼───────────┼───────────────────── 236│EC │ Ö Ö Ö │ ì ∞ ý │Oe, ig, infinity, ya 237│ED │ Ò Ò Ò │ í φ Ý │Og, ia, phi, Ya 238│EE │ Ó Ó Ó │ î ε ¯ │Oa, ic, epsilon, │ │ │ │overline 239│EF │ Õ Õ Õ │ ï ∩ ´ │Ot, ie, intersect, │ │ │ │acute ───┼───┼────────────────────┼───────────┼───────────────────── 24 │F │ │ ð ≡ SHY│eth, identical 241│F1 │ 1 1 1 1 1 │ ñ ± ± │nt, pm 242│F2 │ 2 2 2 2 2 │ ò ≥ ═ │og, ge, eq 243│F3 │ 3 3 3 3 3 │ ó ≤ ¾ │oa, le, frac34 ───┼───┼────────────────────┼───────────┼───────────────────── 244│F4 │ 4 4 4 4 4 │ ô  ¶ │oc, inttop, par 245│F5 │ 5 5 5 5 5 │ õ  § │ot, intbot, section 246│F6 │ 6 6 6 6 6 │ ö ÷ ÷ │oe, div 247│F7 │ 7 7 7 7 7 │ ÷ ≈ ¸ │div, nearly(5), │ │ │ │cedilla ───┴───┴────────────────────┴───────────┴─────────────────────

59

Code Assignments (Cont'd)

───┬───┬────────────────────┬───────────┬───────────────────── │ │ EBCDIC(4) │ISO IBM-PC │BookMaster Dec│Hex│81C 94C 37 5 147│-8 437 85│Symbol Names(2) ───┼───┼────────────────────┼───────────┼───────────────────── 248│F8 │ 8 8 8 8 8 │ ø ° ° │os, degree 249│F9 │ 9 9 9 9 9 │ ù  ¨ │ug, lmultdot, umlaut 25 │FA │ ˜ ˜ ˜ │ ú — — │sup3, ua, smultdot 251│FB │ Û Û Û │ û √  │Uc, uc, sqrt, sup1 ───┼───┼────────────────────┼───────────┼───────────────────── 252│FC │ Ü Ü Ü │ ü  ˜ │Ue, ue, supn, sup3 253│FD │ Ù Ù Ù │ ý • • │Ug, ya, sup2 254│FE │ Ú Ú Ú │ þ ■ ■ │Ua, thorn, sqbul 255│FF │EO EO EO EO EO │ ÿ RSP RSP│ye ───┴───┴────────────────────┴───────────┴───────────────────── (1) The ASCII controls and graphics are from ANSI X3.4. The ISO-8 controls are from ISO 6429, and the graphics are from ISO 8859-1. The ISO-8 graphics are code page 00819, named ISO/ANSI Multilingual. IBM-PC controls and graphics are shown. The graphics are common to code page 00437, named Personal Computer, and code page 00850, named Personal Computer - Multilingual Page. Code pages 00437 and 00850 are shown separately beginning at X'80', after which they diverge in content. (2) The symbol names shown are to be preceded by an ampersand (&) and followed by a period (.) to form a symbol. Source: SC34-5009. (3) ASCII, ISO-8, and IBM-PC X'27' and EBCDIC X'7D' are an apostrophe having the appearance of a straight single quote. The BookMaster “apos” produces a character having the appearance of an accent acute. (4) Five columns of EBCDIC graphics are shown. The first is the 81-character character set 0640, called the syntactic character set, that is mapped the same on all EBCDIC code pages. The second is the standard IBM 94-character character set mapped on code page 00037. The third is code page 00037, named USA/Canada - CECP (Country Extended Code Page). The fourth is code page 00500, named International #5. The fifth is code page 01047, named Latin 1/Open Systems. Code pages 00037, 00500, 01047, and 00819 (ISO-8) all map the 189-character character set 0697. Source: SE09-8002. (5) ƒ, ≈, and Θ are of nonstandard width. (6) EBCDIC X'A0' and ISO-8 X'B5' are micro but resemble mu. The BookMaster “usec” produces a character of nonstandard width.

Control Character Representations ACK BEL BS BYP CAN CR CSP CU1 CU3 DC1 DC2 DC3 DC4 DEL DLE DS EM ENP ENQ EO EOT ESC ETB ETX FF FS GE HT IFS IGS INP IR IRS

60

Acknowledge Bell Backspace Bypass Cancel Carriage Return Control Sequence Prefix Customer Use 1 Customer Use 3 Device Control 1 Device Control 2 Device Control 3 Device Control 4 Delete Data Link Escape Digit Select End of Medium Enable Presentation Enquiry Eight Ones End of Transmission Escape End of Transmission Block End of Text Form Feed Field Separator Graphic Escape Horizontal Tab Interchange File Separator Interchange Group Separator Inhibit Presentation Index Return Interchange Record Separator

IT ITB IUS LF MFA NAK NBS NL NUL POC PP RES RFF RNL RPT SA SBS SEL SFE SI SM SO SOH SOS SPS STX SUB SW SYN TRN UBS VT WUS

ESA/390 Reference Summary

Indent Tab Intermediate Transmission Block International Unit Separator Line Feed Modify Field Attribute Negative Acknowledge Numeric Backspace New Line Null Program-Operator Communication Presentation Position Restore Required Form Feed Required New Line Repeat Set Attribute Subscript Select Start Field Extended Shift In Set Mode Shift Out Start of Heading Start of Significance Superscript Start of Text Substitute Switch Synchronous Idle Transparent Unit Backspace Vertical Tab Word Underscore

Code Assignments (Cont'd)

Additional ISO-8 Control Character Representations APC BPH CCH CSI DCS EPA ESA HTJ HTS IFS IGS IND IRS MW NBH NEL

Application Program Command Break Permitted Here Cancel Character Control Sequence Introducer Device Control String End of Guarded Area End of Selected Area Character Tabulation with Justification Character Tabulation Set Information Separator Four Information Separator Three Index Information Separator Two Message Waiting No Break Here Next Line

OSC PLD PLU PM PU1 PU2 RI SCI SOS SPA SSA SS2 SS3 ST STS US VTS

Operating System Command Partial Line Down Partial Line Up Privacy Message Private Use One Private Use Two Reverse Line Feed (or Index) Single Character Introducer Start of String Start of Guarded Area Start of Selected Area Single Shift Two Single Shift Three String Terminator Set Transmit State Information Separator One Line Tabulation Set

Formatting Character Representations NSP RSP

Numeric Space Required Space

SP SHY

Space Syllable Hyphen

Two-Character BSC Data Link Controls Function ACK-0 ACK-1 WACK RVI

EBCDIC DLE,X'70' DLE,X'61' DLE,X'68' DLE,X'7C'

ASCII DLE,0 DLE,1 DLE,; DLE,<

Commonly Used Editing Pattern Characters Code (Hex) 20 21 22 40 4B

Meaning Digit selector Start of significance Field separator Blank Period

Code (Hex) 5B 5C 6B C3D9 C4C2

Meaning Dollar sign Asterisk Comma CR (credit) DB (debit)

ANSI-Defined Printer Control Characters (A in RECFM field of DCB) Code blank 0 + 1

Action before Printing Record Space 1 line Space 2 lines Space 3 lines Suppress space Skip to line 1 on new page

Hexadecimal and Decimal Conversion From hex: locate each hex digit in its corresponding column position and note the decimal equivalents. Add these to obtain the decimal value. From decimal: (1) locate the largest decimal value in the table that will fit into the decimal number to be converted, and (2) note its hex equivalent and hex column position. (3) Find the decimal remainder. Repeat the process on this and subsequent remainders. Note: Hexadecimal equivalents of all numbers from 0 to 255 are listed in the code tables.

61

Bits: Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

62

0 268,435,456 536,870,912 805,306,368 1,073,741,824 1,342,177,280 1,610,612,736 1,879,048,192 2,147,483,648 2,415,919,104 2,684,354,560 2,952,790,016 3,221,225,472 3,489,660,928 3,758,096,384 4,026,531,840 8

0123 Dec

Byte

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

0 16,777,216 33,554,432 50,331,648 67,108,864 83,886,080 100,663,296 117,440,512 134,217,728 150,994,944 167,772,160 184,549,376 201,326,592 218,103,808 234,881,024 251,658,240 7

4567 Dec

Halfword

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 1,048,576 2,097,152 3,145,728 4,194,304 5,242,880 6,291,456 7,340,032 8,388,608 9,437,184 10,485,760 11,534,336 12,582,912 13,631,488 14,680,064 15,728,640 6

0123 Dec

Byte 4567 Hex Dec 0 0 1 65,536 2 131,072 3 196,608 4 262,144 5 327,680 6 393,216 7 458,752 8 524,288 9 589,824 A 655,360 B 720,896 C 786,432 D 851,968 E 917,504 F 983,040 5

Word

0123 Hex Dec 0 0 1 4,096 2 8,192 3 12,288 4 16,384 5 20,480 6 24,576 7 28,672 8 32,768 9 36,864 A 40,960 B 45,056 C 49,152 D 53,248 E 57,344 F 61,440 4

Byte 4567 Hex Dec 0 0 1 256 2 512 3 768 4 1,024 5 1,280 6 1,536 7 1,792 8 2,048 9 2,304 A 2,560 B 2,816 C 3,072 D 3,328 E 3,584 F 3,840 3

Byte 0123 4567 Hex Dec Hex Dec 0 0 0 0 1 16 1 1 2 32 2 2 3 48 3 3 4 64 4 4 5 80 5 5 6 96 6 6 7 112 7 7 8 128 8 8 9 144 9 9 A 160 A 10 B 176 B 11 C 192 C 12 D 208 D 13 E 224 E 14 F 240 F 15 2 1

Halfword

Hexadecimal and Decimal Conversion (Cont'd)

ESA/390 Reference Summary

Powers of 2 and 16 m 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

n 0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

1 2 4 9 18

1 2 4 9 18 36 72 144 288 576 152 305 611 223 446

1 2 4 8 17 35 70 140 281 562 125 251 503 007 014 028 057 115 230 460 921 843 686 372 744

1 2 4 8 17 34 68 137 274 549 099 199 398 796 592 184 368 737 474 949 899 799 599 199 398 797 594 188 376 752 504 009 018 036 073

2m and 16n 1 2 4 8 16 32 64 128 256 512 1 024 2 048 4 096 8 192 16 384 32 768 65 536 131 072 262 144 524 288 1 048 576 2 097 152 4 194 304 8 388 608 16 777 216 33 554 432 67 108 864 134 217 728 268 435 456 536 870 912 073 741 824 147 483 648 294 967 296 589 934 592 179 869 184 359 738 368 719 476 736 438 953 472 877 906 944 755 813 888 511 627 776 023 255 552 046 511 104 093 022 208 186 044 416 372 088 832 744 177 664 488 355 328 976 710 656 953 421 312 906 842 624 813 685 248 627 370 496 254 740 992 509 481 984 018 963 968 037 927 936 075 855 872 151 711 744 303 423 488 606 846 976 213 693 952 427 387 904 854 775 808 709 551 616

Symbol

K (kilo)

M (mega)

G (giga)

T (tera)

P (peta)

E (exa)

63

64

ESA/390 Reference Summary

IBM



File Number: S390-00 Printed in the United States of America on recycled paper containing 10% recovered post-consumer fiber.

SA22-72 9- 4