Electrical Measurments For Microwave Devices
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ELECTRICAL MEASUREMENTS ELECTRICAL MEASURMENTS FOR MICROWAVE DEVICES Selecting a section will link to its page. A. GENERAL PRECAUTIONS
2
B. HANDLING PRECAUTIONS
2
C. BIAS CIRCUIT 1.) DC SUPPLY CIRCUIT 2.) RF BIAS CIRCUIT
3 3 4
D. MEASUREMENT SYSTEM DIAGRAMS 1.) POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Discrete and Partially Matched FETs 2.) POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Internally Matched FETs 3.) IM3 MEASUREMENT SYSTEM BLOCK DIAGRAM 4.) PHASE DEVIATION MEASUREMENT SYSTEM BLOCK DIAGRAM 5.) PULSE POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Pulsed Drain Bias 6.) NOISE FIGURE AND ASSOCIATED GAIN MEASUREMENT SYSTEM BLOCK
5 5
DIAGRAM 7.) THERMAL RESISTANCE MEASUREMENT SYSTEM BLOCK DIAGRAM AND MEASUREMENT PROCEDURE
Microwave Support Documentation
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6 7 8 9
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ANMEM0902
ELECTRICAL MEASUREMENTS A. GENERAL PRECAUTIONS 1) Observe recommended operating conditions and absolute maximum ratings: VDS, IDS, VGS, IG, TCH. Absolute Maximum Ratings are the limits one should not exceed under any conditions and does not mean actual applicable bias condition. Fujitsu recommends the following conditions for long life and reliable operation. TCH VDS
= 145°C max
VGS
= VGS shall be set for the IDS (0.6 IDSS to 0.55 IDSS) = See the individual data sheets
IG
= See the individual data sheets
2) Use a sequencing DC power supply. See the individual data sheets or Figure III-1. 3) Do not apply RF power until the FET is biased on. Turn-off RF power before removing bias. 4) Use only properly designed RF circuits and decoupling circuits to prevent bias circuit oscillations. Bias oscillations are one of the most common modes of failure for microwave GaAs FETs. Destruction of the FET often occurs in microseconds. Refer to the individual data sheets or Figure III-3 , for the recommended bias circuit configuration.
B. HANDLING PRECAUTIONS GaAs FETS are sensitive to electrostatic discharge. Fujitsu ships all GaAs FETs in electrostatic protection packaging. User must pay careful attention to the following precautions when taking FETs out of their packaging. 1) Personnel handling GaAs FETs should be properly grounded by a wristlet chain or equivalent. 2) When mounting the FET in a circuit, the circuit gate and drain connections should be shorted to ground. 3) When soldering the FET leads, an iron with a grounded tip is required.
Microwave Support Documentation
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ELECTRICAL MEASUREMENTS C. BIAS CIRCUIT This application note is intended to instruct the user in proper DC biasing of GaAs FET devices. Areas to be discussed include D.C. supply circuit and RF bias circuit. 1)
DC Supply Circuit When applying D.C. bias to a device in a common source configuration, a negative gate voltage must be supplied first, followed by a positive drain voltage. Conversely, when removing DC bias, the drain voltage must be removed first, followed by the gate voltage. A GaAs FET, with drain voltage applied and floating or zero gate voltage, is likely to oscillate and may damage the device. In the case of a bias application, a self sequencing, fault protected bias supply is recommended. Fujitsu has developed a voltage-regulated bias supply which satisfies the requirements for safely biasing GaAs FETs. An example of the bias supply circuit is shown in Figure III-1. E1 VIN +12V D12
E2 VOUT +10V
TR1 +
-
R15
R16
C2
R18
R14
R13
R11
R17
+
TR2
D7
D5
+
+
D10
-
TR3
C1
R12
-
- C7
C6
D8 GND
C3 + -
3 2 8
IC2
4 5
+
-
GND
+
C5
-
C4
D9 E3 VOUT -5V
IC1
Figure III-1. Suggested Circuit
TR1 TR2,TR3 IC1 IC2 D9 D5, D10 D7,D8 D12 C1,C4,C6 C2 C3,C5,C7
2SD 1297 2SC 2712 NJM79L05UA (JRC) LTC1044CSB ISS1B1 RD51MB1 (NEC) RD4.3PB (NEC) U1BZ41 CS98E1V6R000-K41B CS98E1V6R800-K41D CS98E1E10R00-K41D
R11 R12 R13 R17 R16 R14 R15 R18
CHIP RESISTOR, 1/10W, 510 OHM CHIP RESISTOR, 1/10W, 680 OHM CHIP RESISTOR, 1/10W, 220 OHM CHIP RESISTOR, 1/10W, 1K OHM CHIP RESISTOR, 1/10W, 6.2K OHM CHIP RESISTOR, 1/10W, 510 OHM to 1K OHM CHIP RESISTOR, 1/8W 100 OHM 390 OHM, 1/8W
This regulated bias circuit is designed to provide a constant positive drain voltage (+VDS) of 10V and an output current of 20 Amperes.
Microwave Support Documentation
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ANMEM0902
ELECTRICAL MEASUREMENTS Vin: ON
Vin: OFF
+Vout (V)
10
+Vout (V) 5
10 msec
-2 -4
-Vout (V) -Vout (V)
-6
Figure III-2. Switching Response of the Bias Circuit
2)
RF Bias Circuit The injection of bias voltages into a GaAs FET RF circuit is typically accomplished via a quarterwave transformer line as shown in Figure III-3. It is intended to provide a DC connection to the GaAs FET gate and drain, while perturbing the RF performance characteristics as little as possible.
High impedence λ/4 line
High impedence λ/4 line
Low impedence λ/4 line
Low impedence λ/4 line R2
R1
C2
C1
L1
L2
R3
R4 C3 Rg=R1 +
R3 x R4 R3 + R4
C5
-VGS
C1, C2: 1000pF, Chip L1, L2 : Large inductor at RF frequency or λ/4 line Chosen for desired R1 VGS, IDS and R3 gate impedance R4 R2 : 50Ω Chip C3, C4: 1000pF feed thru C5, C6: about 10µF
}
C4 C6 +VDS
Figure III-3. Connection of the Bias Supply to the GaAs FET's Microwave Support Documentation
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ELECTRICAL D. MEASUREMENT SYSTEM DIAGRAMS 1. POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Discrete and Partially Matched FETs
POWER METER
POWER METER VGS
VDS
POWER SENSOR
POWER SENSOR
DIRECTIONAL COUPLER
BIAS TEE
50 Ω term.
RF POWER SOURCE
TUNER
D.U.T.
TUNER
BIAS TEE
ATTEN.
Rg *
IGS
IDS
-VGG
+VDD
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
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ELECTRICAL MEASUREMENTS 2. POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Internally Matched FETs
RF AMP
SCALER NETWORK ANALYZER
RF POWER SOURCE
VDS
VGS 50 Ω term. DETECTOR
DIRECTIONAL COUPLER
DIRECTIONAL COUPLER
DETECTOR
BIAS TEE
DC Block
Rg *
POWER SENSOR
BIAS TEE
D.U.T.
DIRECTIONAL COUPLER
DC Block ATTEN.
50 Ω term.
50 Ω term. IDS
IGS POWER METER
POWER SENSOR -VGG
+VDD
DC POWER SUPPLY
POWER METER
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
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ELECTRICAL MEASUREMENTS 3. IM3 MEASUREMENT SYSTEM BLOCK DIAGRAM 50 Ω term.
50 Ω Ω 50 term.
RF AMP
RF POWER SOURCE Freq.=f
RF AMP
RF POWER SOURCE Freq.=f+∆f
SPECTRUM ANALYZER
3 dB Hybrid
ATTEN.
VGS
50 Ω term.
VAR. ATTEN.
VDS
DIRECTIONAL COUPLER
BIAS TEE
BIAS TEE
D.U.T.
DC Block
Rg *
DIRECTIONAL COUPLER
DC Block
POWER SENSOR
ATTEN. 50 Ω term.
50 Ω term. IDS
IGS POWER METER
POWER SENSOR -VGG
+VDD POWER METER
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
EFFECT OF A DRIVER AMPLIFIER ON TOTAL IMD
[
(
Degradation in IM3 = 20 log 1+10 where
IM3(D) - IM3(F) 20
)
IM3(D) is the driver stage IM3 IM3(F) is the final stage IM3
IM3 (D)
[
Degradation in IM3 (dB)
Be sure that the power level of signals input to the spectrum analyzer remain in the linear range of the analyzer's internal mixer. example: IM3 (D) = -40dBc IM3 (F) = -30dBc IM3 = -30 + 2.4 = -27.6dBc
6
4
2
IM3 (F) 0
10
20
30
IM3 (F) - IM3 (D)
Microwave Support Documentation
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ELECTRICAL MEASUREMENTS 4. PHASE DEVIATION MEASUREMENT SYSTEM BLOCK DIAGRAM
RF AMP LOW PASS FILTER
VECTOR NETWORK ANALYZER
CONVERTER/ TEST SET
RF POWER SOURCE
REF
TEST
50 Ω term. PHASE SHIFTER
VAR. ATTEN.
DIRECTIONAL COUPLER
DIRECTIONAL COUPLER
VGS
BIAS TEE
POWER SENSOR
BIAS TEE
D.U.T.
DC Block
Rg *
VAR. ATTEN.
VDS
ATTEN.
DIRECTIONAL COUPLER
DC Block ATTEN.
50 Ω term.
50 Ω term.
IGS
IDS
POWER METER
POWER SENSOR -VGG
+VDD
DC POWER SUPPLY
POWER METER
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
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ANMEM0902
ELECTRICAL MEASUREMENTS 5. PULSE POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Pulsed Drain Bias
RF AMP
PULSE MODULATOR
RF POWER SOURCE
PULSE GENERATOR PULSE DRIVER Pulsed Drain Bias
VGS
VAR. ATTEN.
DIRECTIONAL COUPLER
BIAS TEE
POWER SENSOR
PEAK POWER METER
50 Ω term.
OSCILLOSCOPE
BIAS TEE
D.U.T.
DC Block
Rg *
50 Ω term.
Trig. CH-1 CH-2
DC Block
ATTEN.
50 Ω term. POWER SENSOR
IGS
-VGG
+VDD
PEAK POWER METER
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Package Outlines
Microwave Support
9
ANMEM0902
ELECTRICAL MEASUREMENTS 6. NOISE FIGURE AND ASSOCIATED GAIN MEASUREMENT SYSTEM BLOCK DIAGRAM
LOCAL OSCILLATOR NOISE FIGURE AND GAIN METER
MIXER
VGS
VDS LOW NOISE AMPLIFIER
NOISE SOURCE
BIAS TEE
50 Ω term.
TUNER
D.U.T.
TUNER
BIAS TEE
Rg *
50 Ω term.
IGS
IDS
-VGG
+VDD
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
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ELECTRICAL MEASUREMENTS 7. THERMAL RESISTANCE MEASUREMENT SYSTEM BLOCK DIAGRAM AND MEASUREMENT PROCEDURE D.U.T.
S3 S1
S2
VGS Detector
S4
IDS
IM
-VGS
+VDS
DC POWER SUPPLY
MEASUREMENT PROCEDURE Open and close switches S1, S2, S3, and S4 according to the timing diagram illustrated in Figure 2. The heat interval should be much longer than the thermal response time of the device under test (10 seconds). The measurement interval should be as short as possible (less than 50 µsec.). The constant measurement current (IM) is a small current so selected that the measurement power dissipation may be neglected compared to the heat power dissipation. The measurement is made in the following manner: a. VDS is set to a specified value. b. VGS is set to a specified value, or adjusted to obtain a specified drain current IDS. c. VGS1 is measured during the pre-heat measurement interval. d. VGS2 is measured during the post-heat measurement interval.
S1
S2
S3
Then thermal resistance is calculated as follows: S4
Rth(Channel-Case) = (VGS1-VGS2)/(K x VDSx IDS ) Where K is the thermal coefficient of VGS (mV/°C)
VGS1 Measurement Interval
K is obtained in the following manner:
Heat Interval
VGS2 Measurement Interval
Figure 2. Switch Timing Diagram a. Short the DUT drain and source to ground. b. Adjust the gate forward current to the value IM. c. Measure VGS at two different ambient temperatures less than 100°C. Then K is calculated as follows: K=(VGSa-VGSb)/(Tb-Ta) where Tb>Ta Note: DC bias conditions and accept/reject criteria shall be included in individual device specifications.
Microwave Support Documentation
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for further information please contact: FUJITSU COMPOUND SEMICONDUCTOR, INC. 2355 Zanker Rd. San Jose, CA 95131-1138, U. S. A. TEL: (408) 232-9500 FAX: (408) 428-9111 www.fcsi.fujitsu.com
FUJITSU QUANTUM DEVICES EUROPE, LTD. Network House Norreys Drive Maidenhead, Berkshire SL6 4FJ United Kingdom TEL: +44 (0) 1628 504800 FAX: +44 (0) 1628 504888
FUJITSU QUANTUM DEVICES SINGAPORE PTE LTD. HONG KONG BRANCH Rm. 1101, Ocean Centre, 5 Canton Rd. Tsim Sha Tsui, Kowloon, Hong Kong TEL: +852-2377-0227 FAX: +852-2377-3921 FUJITSU QUANTUM DEVICES LIMITED Business Development Division 11th Floor, Hachioji Daiichi-Seimei Bldg. 3-20-6 Myojin-cho Hachioji-city, Tokyo, 192-0046, Japan TEL: +81-426-43-5885 FAX: +81-426-43-5582
©2001 FUJITSU COMPOUND SEMICONDUCTOR, INC. Printed in U.S.A. FCSI012001M3.5K
2
B. HANDLING PRECAUTIONS
2
C. BIAS CIRCUIT 1.) DC SUPPLY CIRCUIT 2.) RF BIAS CIRCUIT
3 3 4
D. MEASUREMENT SYSTEM DIAGRAMS 1.) POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Discrete and Partially Matched FETs 2.) POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Internally Matched FETs 3.) IM3 MEASUREMENT SYSTEM BLOCK DIAGRAM 4.) PHASE DEVIATION MEASUREMENT SYSTEM BLOCK DIAGRAM 5.) PULSE POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Pulsed Drain Bias 6.) NOISE FIGURE AND ASSOCIATED GAIN MEASUREMENT SYSTEM BLOCK
5 5
DIAGRAM 7.) THERMAL RESISTANCE MEASUREMENT SYSTEM BLOCK DIAGRAM AND MEASUREMENT PROCEDURE
Microwave Support Documentation
1
6 7 8 9
10 11
ANMEM0902
ELECTRICAL MEASUREMENTS A. GENERAL PRECAUTIONS 1) Observe recommended operating conditions and absolute maximum ratings: VDS, IDS, VGS, IG, TCH. Absolute Maximum Ratings are the limits one should not exceed under any conditions and does not mean actual applicable bias condition. Fujitsu recommends the following conditions for long life and reliable operation. TCH VDS
= 145°C max
VGS
= VGS shall be set for the IDS (0.6 IDSS to 0.55 IDSS) = See the individual data sheets
IG
= See the individual data sheets
2) Use a sequencing DC power supply. See the individual data sheets or Figure III-1. 3) Do not apply RF power until the FET is biased on. Turn-off RF power before removing bias. 4) Use only properly designed RF circuits and decoupling circuits to prevent bias circuit oscillations. Bias oscillations are one of the most common modes of failure for microwave GaAs FETs. Destruction of the FET often occurs in microseconds. Refer to the individual data sheets or Figure III-3 , for the recommended bias circuit configuration.
B. HANDLING PRECAUTIONS GaAs FETS are sensitive to electrostatic discharge. Fujitsu ships all GaAs FETs in electrostatic protection packaging. User must pay careful attention to the following precautions when taking FETs out of their packaging. 1) Personnel handling GaAs FETs should be properly grounded by a wristlet chain or equivalent. 2) When mounting the FET in a circuit, the circuit gate and drain connections should be shorted to ground. 3) When soldering the FET leads, an iron with a grounded tip is required.
Microwave Support Documentation
2
ANMEM0902
ELECTRICAL MEASUREMENTS C. BIAS CIRCUIT This application note is intended to instruct the user in proper DC biasing of GaAs FET devices. Areas to be discussed include D.C. supply circuit and RF bias circuit. 1)
DC Supply Circuit When applying D.C. bias to a device in a common source configuration, a negative gate voltage must be supplied first, followed by a positive drain voltage. Conversely, when removing DC bias, the drain voltage must be removed first, followed by the gate voltage. A GaAs FET, with drain voltage applied and floating or zero gate voltage, is likely to oscillate and may damage the device. In the case of a bias application, a self sequencing, fault protected bias supply is recommended. Fujitsu has developed a voltage-regulated bias supply which satisfies the requirements for safely biasing GaAs FETs. An example of the bias supply circuit is shown in Figure III-1. E1 VIN +12V D12
E2 VOUT +10V
TR1 +
-
R15
R16
C2
R18
R14
R13
R11
R17
+
TR2
D7
D5
+
+
D10
-
TR3
C1
R12
-
- C7
C6
D8 GND
C3 + -
3 2 8
IC2
4 5
+
-
GND
+
C5
-
C4
D9 E3 VOUT -5V
IC1
Figure III-1. Suggested Circuit
TR1 TR2,TR3 IC1 IC2 D9 D5, D10 D7,D8 D12 C1,C4,C6 C2 C3,C5,C7
2SD 1297 2SC 2712 NJM79L05UA (JRC) LTC1044CSB ISS1B1 RD51MB1 (NEC) RD4.3PB (NEC) U1BZ41 CS98E1V6R000-K41B CS98E1V6R800-K41D CS98E1E10R00-K41D
R11 R12 R13 R17 R16 R14 R15 R18
CHIP RESISTOR, 1/10W, 510 OHM CHIP RESISTOR, 1/10W, 680 OHM CHIP RESISTOR, 1/10W, 220 OHM CHIP RESISTOR, 1/10W, 1K OHM CHIP RESISTOR, 1/10W, 6.2K OHM CHIP RESISTOR, 1/10W, 510 OHM to 1K OHM CHIP RESISTOR, 1/8W 100 OHM 390 OHM, 1/8W
This regulated bias circuit is designed to provide a constant positive drain voltage (+VDS) of 10V and an output current of 20 Amperes.
Microwave Support Documentation
3
ANMEM0902
ELECTRICAL MEASUREMENTS Vin: ON
Vin: OFF
+Vout (V)
10
+Vout (V) 5
10 msec
-2 -4
-Vout (V) -Vout (V)
-6
Figure III-2. Switching Response of the Bias Circuit
2)
RF Bias Circuit The injection of bias voltages into a GaAs FET RF circuit is typically accomplished via a quarterwave transformer line as shown in Figure III-3. It is intended to provide a DC connection to the GaAs FET gate and drain, while perturbing the RF performance characteristics as little as possible.
High impedence λ/4 line
High impedence λ/4 line
Low impedence λ/4 line
Low impedence λ/4 line R2
R1
C2
C1
L1
L2
R3
R4 C3 Rg=R1 +
R3 x R4 R3 + R4
C5
-VGS
C1, C2: 1000pF, Chip L1, L2 : Large inductor at RF frequency or λ/4 line Chosen for desired R1 VGS, IDS and R3 gate impedance R4 R2 : 50Ω Chip C3, C4: 1000pF feed thru C5, C6: about 10µF
}
C4 C6 +VDS
Figure III-3. Connection of the Bias Supply to the GaAs FET's Microwave Support Documentation
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ANMEM0902
ELECTRICAL D. MEASUREMENT SYSTEM DIAGRAMS 1. POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Discrete and Partially Matched FETs
POWER METER
POWER METER VGS
VDS
POWER SENSOR
POWER SENSOR
DIRECTIONAL COUPLER
BIAS TEE
50 Ω term.
RF POWER SOURCE
TUNER
D.U.T.
TUNER
BIAS TEE
ATTEN.
Rg *
IGS
IDS
-VGG
+VDD
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
5
ANMEM0902
ELECTRICAL MEASUREMENTS 2. POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Internally Matched FETs
RF AMP
SCALER NETWORK ANALYZER
RF POWER SOURCE
VDS
VGS 50 Ω term. DETECTOR
DIRECTIONAL COUPLER
DIRECTIONAL COUPLER
DETECTOR
BIAS TEE
DC Block
Rg *
POWER SENSOR
BIAS TEE
D.U.T.
DIRECTIONAL COUPLER
DC Block ATTEN.
50 Ω term.
50 Ω term. IDS
IGS POWER METER
POWER SENSOR -VGG
+VDD
DC POWER SUPPLY
POWER METER
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
6
ANMEM0902
ELECTRICAL MEASUREMENTS 3. IM3 MEASUREMENT SYSTEM BLOCK DIAGRAM 50 Ω term.
50 Ω Ω 50 term.
RF AMP
RF POWER SOURCE Freq.=f
RF AMP
RF POWER SOURCE Freq.=f+∆f
SPECTRUM ANALYZER
3 dB Hybrid
ATTEN.
VGS
50 Ω term.
VAR. ATTEN.
VDS
DIRECTIONAL COUPLER
BIAS TEE
BIAS TEE
D.U.T.
DC Block
Rg *
DIRECTIONAL COUPLER
DC Block
POWER SENSOR
ATTEN. 50 Ω term.
50 Ω term. IDS
IGS POWER METER
POWER SENSOR -VGG
+VDD POWER METER
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
EFFECT OF A DRIVER AMPLIFIER ON TOTAL IMD
[
(
Degradation in IM3 = 20 log 1+10 where
IM3(D) - IM3(F) 20
)
IM3(D) is the driver stage IM3 IM3(F) is the final stage IM3
IM3 (D)
[
Degradation in IM3 (dB)
Be sure that the power level of signals input to the spectrum analyzer remain in the linear range of the analyzer's internal mixer. example: IM3 (D) = -40dBc IM3 (F) = -30dBc IM3 = -30 + 2.4 = -27.6dBc
6
4
2
IM3 (F) 0
10
20
30
IM3 (F) - IM3 (D)
Microwave Support Documentation
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ANMEM0902
ELECTRICAL MEASUREMENTS 4. PHASE DEVIATION MEASUREMENT SYSTEM BLOCK DIAGRAM
RF AMP LOW PASS FILTER
VECTOR NETWORK ANALYZER
CONVERTER/ TEST SET
RF POWER SOURCE
REF
TEST
50 Ω term. PHASE SHIFTER
VAR. ATTEN.
DIRECTIONAL COUPLER
DIRECTIONAL COUPLER
VGS
BIAS TEE
POWER SENSOR
BIAS TEE
D.U.T.
DC Block
Rg *
VAR. ATTEN.
VDS
ATTEN.
DIRECTIONAL COUPLER
DC Block ATTEN.
50 Ω term.
50 Ω term.
IGS
IDS
POWER METER
POWER SENSOR -VGG
+VDD
DC POWER SUPPLY
POWER METER
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
8
ANMEM0902
ELECTRICAL MEASUREMENTS 5. PULSE POWER MEASUREMENT SYSTEM BLOCK DIAGRAM Pulsed Drain Bias
RF AMP
PULSE MODULATOR
RF POWER SOURCE
PULSE GENERATOR PULSE DRIVER Pulsed Drain Bias
VGS
VAR. ATTEN.
DIRECTIONAL COUPLER
BIAS TEE
POWER SENSOR
PEAK POWER METER
50 Ω term.
OSCILLOSCOPE
BIAS TEE
D.U.T.
DC Block
Rg *
50 Ω term.
Trig. CH-1 CH-2
DC Block
ATTEN.
50 Ω term. POWER SENSOR
IGS
-VGG
+VDD
PEAK POWER METER
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Package Outlines
Microwave Support
9
ANMEM0902
ELECTRICAL MEASUREMENTS 6. NOISE FIGURE AND ASSOCIATED GAIN MEASUREMENT SYSTEM BLOCK DIAGRAM
LOCAL OSCILLATOR NOISE FIGURE AND GAIN METER
MIXER
VGS
VDS LOW NOISE AMPLIFIER
NOISE SOURCE
BIAS TEE
50 Ω term.
TUNER
D.U.T.
TUNER
BIAS TEE
Rg *
50 Ω term.
IGS
IDS
-VGG
+VDD
DC POWER SUPPLY
* Use Fujitsu's recommended gate resistance (Rg) as indicated on the data sheet for the device under test . Follow device handling and bias precautions presented at the beginning of this section.
Microwave Support Documentation
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ANMEM0902
ELECTRICAL MEASUREMENTS 7. THERMAL RESISTANCE MEASUREMENT SYSTEM BLOCK DIAGRAM AND MEASUREMENT PROCEDURE D.U.T.
S3 S1
S2
VGS Detector
S4
IDS
IM
-VGS
+VDS
DC POWER SUPPLY
MEASUREMENT PROCEDURE Open and close switches S1, S2, S3, and S4 according to the timing diagram illustrated in Figure 2. The heat interval should be much longer than the thermal response time of the device under test (10 seconds). The measurement interval should be as short as possible (less than 50 µsec.). The constant measurement current (IM) is a small current so selected that the measurement power dissipation may be neglected compared to the heat power dissipation. The measurement is made in the following manner: a. VDS is set to a specified value. b. VGS is set to a specified value, or adjusted to obtain a specified drain current IDS. c. VGS1 is measured during the pre-heat measurement interval. d. VGS2 is measured during the post-heat measurement interval.
S1
S2
S3
Then thermal resistance is calculated as follows: S4
Rth(Channel-Case) = (VGS1-VGS2)/(K x VDSx IDS ) Where K is the thermal coefficient of VGS (mV/°C)
VGS1 Measurement Interval
K is obtained in the following manner:
Heat Interval
VGS2 Measurement Interval
Figure 2. Switch Timing Diagram a. Short the DUT drain and source to ground. b. Adjust the gate forward current to the value IM. c. Measure VGS at two different ambient temperatures less than 100°C. Then K is calculated as follows: K=(VGSa-VGSb)/(Tb-Ta) where Tb>Ta Note: DC bias conditions and accept/reject criteria shall be included in individual device specifications.
Microwave Support Documentation
11
ANMEM0902
for further information please contact: FUJITSU COMPOUND SEMICONDUCTOR, INC. 2355 Zanker Rd. San Jose, CA 95131-1138, U. S. A. TEL: (408) 232-9500 FAX: (408) 428-9111 www.fcsi.fujitsu.com
FUJITSU QUANTUM DEVICES EUROPE, LTD. Network House Norreys Drive Maidenhead, Berkshire SL6 4FJ United Kingdom TEL: +44 (0) 1628 504800 FAX: +44 (0) 1628 504888
FUJITSU QUANTUM DEVICES SINGAPORE PTE LTD. HONG KONG BRANCH Rm. 1101, Ocean Centre, 5 Canton Rd. Tsim Sha Tsui, Kowloon, Hong Kong TEL: +852-2377-0227 FAX: +852-2377-3921 FUJITSU QUANTUM DEVICES LIMITED Business Development Division 11th Floor, Hachioji Daiichi-Seimei Bldg. 3-20-6 Myojin-cho Hachioji-city, Tokyo, 192-0046, Japan TEL: +81-426-43-5885 FAX: +81-426-43-5582
©2001 FUJITSU COMPOUND SEMICONDUCTOR, INC. Printed in U.S.A. FCSI012001M3.5K
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