Ee3102 Experiment 1

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Feedback Amplifiers Matt xxxxx Student ID : xxxxxxx 1/16/07 – 2/26/07

Abstract: Experiment one dealt with feedback amplifiers and the four negative feedback topologies associated with them. We investigated the frequency response of the amplifiers using these feedback topologies and addressed the issues associated with feedback stability. Then additionally, positive feedback was employed to create a sinusoidal oscillator.

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Introduction: Feedback in circuit analysis is one of the most important concepts in electrical engineering, whether positive or negative. It can be used to create a wide variety of circuits, from amplifiers to oscillators. In this experiment we used the concept of feedback to investigate the frequency response of the four negative feedback topologies, as well as a positive feedback application, the Wein Bridge. We observed for each topology, the behavior of the circuit as it relates to various frequency and load changes. Additionally, we used many circuit concepts to study each topology in detail and to observe its effects given external changes.

Experiment

Open Loop Voltage Gain The first section of the experiment asked us to determine and record the open loop voltage gain for three different 741 Op Amps. To do so we constructed the circuit shown in Figure 1.1.1 using the specified values.

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0

15Vdc V1 Input

R 3

R 2

V1

10K

10K R 5 10K 4 5

LM 741

U 2

7 1

R 4 10

Vo

6

+

3

-

2

0

R 1 2K

15Vdc V2

0

Fig 1.1.1 Since the input voltage of the Op Amp is obtained by a simple voltage division we had to choose as accurate resistance values as possible. As it turns out these resistance values were provided to us so everyone would obtain as consistent of data as possible. The procedure of finding the DC open loop voltage gain is identical for all three Op Amps. To do so we set

Vg to some arbitrary value, then proceeded to measure Vi1 and V01 . With these values recorded we then changed the input voltage Vg to a different voltage level and proceeded to find Vi 2 and our input voltage

Vo 2 . Using these values we were then able to able to calculate the DC open loop voltage gain using the following formula.

 V01  Vo 2  *1000  Vi1  Vi 2 

Av  

The collected values and calculations for the three Op Amps using the procedure outlined above are shown below.

For Op Amp 1:

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Vi1  1.35V Vo1  2.64V Vi 2  1.36V Vo 2  3.91V

For

Vg  104mV

For

Vg  95mV

 2.64  3.91  *1000  1.35  1.36  Av  126000 Av  

For Op Amp 2:

Vi1  1.34V Vo1  4.14V Vi 2  1.35V Vo 2  5.08V

For

Vg  106.2mV

For

Vg  1.21V

 4.14  5.08  *1000  1.34  1.35  Av  235000 Av  

For Op Amp 3:

Vi1  1.26V Vo1  3.87V Vi 2  1.26V Vo 2  4.89V

For

Vg  87.3mV

For

Vg  1.092V

 3.87  4.89  *1000  1.26  1.26  Av  165000 Av  

From the analysis of the DC open loop voltage gain we are able to see that the gains for the three different Op Amps were 126000, 235000, and 165000 respectively.

The Four Topologies Section 1.2 Series/Shunt The second section of the experiment asked us to design for a no-load voltage gain of 15 for the respective Series/Shunt feedback circuit shown in figure 1.2.1. We were then to measure the midband voltage gain for various resistive loads. With this completed we determined the low frequency small-signal input resistance

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ and found the dominant pole for the sinusoidal steady state response. Finally we determined the location of the dominant pole in the open loop response of the Op Amp itself.

0

15Vdc V2

U 1 7 1

R 3 V1

V2

3 2

1Vac 0Vdc

Vo

6

4 5

R

+

U A741 R 1 14K

V4

V3

0

R 4 Load

0

R 2 1K

15Vdc

0

0

Fig 1.2.1 In order to determine the necessary values of the resistors to achieve a gain of 15 we used the following two port network equivalent shown in figure 1.2.2. R 2

I1 +

R

V1

R 1 R

-

+ V2

-

Fig 1.2.2 Proceeding we know the gain for a series/shunt amplifier is:

Here we assumed

I2

Af 

Vo Vi

Af 

A 1  A

A  1

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Therefore A f



Where 15 

1 

1 , 

Solving for beta yields:



1  0.06667 15

Now using H parameters for our two port circuit we were able to determine the resistor values as follows.

h12    Choosing R2

R2  6.667 *102 R1  R2

 1k  arbitrarily and solving for R1 yielded R1  14.015k  .

With the circuit design completed and the circuit built we were able to determine the voltage gain as a function of various resistive loads. Gain vs Load resistance Load

vi(V) Vo(V) Gain 0.505 7.69 15.168 0.502 0.2 0.409 0.499 1.036 2.076 0.498 2.06 4.37 0.487 7.45 15.29 0.494 7.58 15.35 0.488 7.46 15.413 0.488 7.46 15.415 0.494 7.56 15.3 Fig 1.2.3 A plot of Gain vs. Load Resistance is shown below. 0 10 50 100 500 1000 10000 100000 1000000

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Gain vs. Load Resistance 18 16 14 12

in a G

10 Series1

8 6 4 2 0 1

10

100

1000 10000 Load Resostance (ohms)

100000

1000000

Fig 1.2.4 Next we found the low frequency small signal input resistance and the location of the dominant pole of the sinusoidal steady state response. To determine this we placed a 100k ohm resister between the input and V+ so we could determine the current flowing into the terminal as shown in figure 1.2.5.

0

15Vdc V2

U 1

V1

7 1

R 3 V2

2

+

1Vac 0Vdc

Vo

6

4 5

100k

3

U A741 R 1 14K

V4

0

V3

R 2 1K

15Vdc

0

-7-

0

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Fig 1.2.5 In order to determine the current flowing into V+ we measured the voltage values at V1, V2 and then used Ohm’s Law to compute the current.

V1  1V V2  0.98V Then using Ohm’s Law.

V1  V2 1  0.98  R 100k I  200nA I

With this current found we could then calculate Rif .

Rif 

Vs V2  Is I

0.98V 280nA Rif  4.9 M  Rif 

To determine the dominant pole we needed to find the closed loop gain for the circuit. We accomplished this by collecting following data: Gain vs Frequency Freq (Hz) Vi (V) Vo (V) 500 0.5 6.94 1000 0.5 7 2000 0.5 7.7 5000 0.5 8 10000 0.5 7.8 15000 0.5 7.8 20000 0.5 7.7 25000 0.48 7.3 30000 0.48 7 40000 0.48 6.6 50000 0.48 5.8 57000 0.48 5 60000 0.48 4.5 70000 0.48 5.5 Fig 1.2.6 A plot of Gain vs. Frequency is shown below.

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Gain 13.88 14.12 15.3 16 15.6 15.6 15.4 15.2 14.58 13.75 12.08 10.35 10.41 9.375

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Gain vs. Frequency 18 16 14 12

in a G

10 Series1

8 6 4 2 0 100

1000

10000

100000

Frequency (Hz)

Fig 1.2.7 Using this data we are able to see that our midband gain is about 15.3V/V. Using this we could then calculate our closed loop gain.

ACL  15.3*.707  10.8 This can be seen to occur at about 57 KHz. Thus

F3dB  57 KHz

With this information we were than able to calculate our dominant pole location.

ACL * F3dB  FD * AOL FD 

ACL * F3dB AOL

Since Op Amp 1 was used for this experiment,

ACL was equal to 126000.

10.35*57 K 126000 FD  4.68 FD 

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Section 1.3 Shunt/Series The third section of the experiment asked us to design for a midband short circuit gain of 100 for the respective Series/Shunt feedback circuit shown in figure 1.3.1. Using this circuit we were to measure the midband gain for various resistive loads.

0

15Vdc V2

7 1

U 1 V2

R 4

3 2

V1

1Vac 0Vdc

1M

V2

VA

6

4 5

0

+

U A741 R 1 Load

V4 R 1

VB 10K V3

0

R 2 101

15Vdc

0

0

Fig 1.3.1 In this circuit we approximated the necessary current source as a voltage source in series with a large resistor. We used a 1M ohm resistor that was chosen arbitrarily. Once again we used two port circuit analyses to determine the necessary resistor values to obtain a midband short circuit gain of 100 (See figure 1.3.1 for the two port network.).

I1 +

R 1

I2 +

R R 2 R

V1

-

V2

-

Fig 1.3.2 Proceeding we know the gain for a Shunt/Series amplifier is:

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Here we assumed



Therefore A f Where 100 

Af 

Io Is

Af 

A 1  A

A  1

1 , 

1 

Solving for beta yields:



1  0.01 100

Now using G parameters for our two port circuit we were able to determine the resistor values as follows.

g12     Choosing R1

 R2  0.01 R1  R2

 10k  arbitrarily and solving for R2 yielded R2  101.01 .

With the circuit design completed and the circuit built we were able to determine the current gain as a function of various resistive loads as follows: Gain vs Load resistance V1 (V) 2.31 2.31 2.31 2.31 2.31 2.31 2.31 2.31 2.5

V2(mV) 300 300 300 280 270 250 250 250 220

Va (mV) 300 300 300 280 270 250 250 250 220

V (mV) Rl (Ohms) I (uA) 300m 0 1.827 340m 220 1.827 410m 500 1.827 530m 1000 1.845 780m 2000 1.855 1.45 5100 1.872 2.52 10000 1.872 4.69 20000 1.872 19.1 100000 2.072 Fig 1.3.3

A plot of Current Gain vs. Load Resistance is shown below.

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Io (uA) 0 181.8 220 250 255 235 227 222 188.8

Gain 0 99.5 120.4 135.5 137.5 125.6 121.2 118 91.08

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Current Gain vs. Load Resistance 160 140 120 100

i a tG n re u C

80

Series1

60 40 20 0 0

220

500

1000 2000 5100 Load Resistance (Ohms)

10000

20000

100000

Fig 1.3.4 Viewing the table and graph we are able to see that the gain is slightly lower for very low and high frequency values. This is acceptable and follows closely with what is expected in circuit theory.

Section 1.4 Series/Series The fourth section of the experiment asked us to design for a midband short circuit transconductance of 1ma/V for the respective Series/Series feedback circuit shown in figure 1.4.1 and to measure the midband transconductance for various resistive loads.

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0

15Vdc V2

U 1 7 1

R 3 V1

V2

3

+

2

4 5

R

1Vac 0Vdc

Vo

6

U A741 R 1 Load

V4

Vl V3

0

R 2 1K

15Vdc

0

0

Fig 1.4.1 Once again we used two port circuit analysis to determine the necessary resistor values to obtain a midband short circuit transconductance of 1mA/V (See figure 1.4.2 for two port network.). I1

I2

+

+ R 1 R

V1

-

V2

-

Fig 1.4.2 Proceeding we know the gain for a shunt/series amplifier is:

Vs  VP  VN Vo  I o R f Vo  Vs  I o R f Solving for Is

Io 

Vo Rf

Now using Z parameters for our two port circuit we were able to determine the resistor values as follows.

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Z12  gm   gm  Rf 

Vs Rf

Io 1 ,   Vs Vs Rf

1 Rf

1  1k  1m

With the circuit design completed and circuit built we were able to determine the transconductance as a function load resistance as follows: Transconductance vs Load Vs (V) 1 1 1.03 1 1.02 1.02 1 1.02 0.3

Vl (V) 1.11 1.11 1.11 1.11 1.11 1.11 1.11 1.1 0.325

Vo (V) Rl (Ohms) Io (mA) 1.11 0 0 1.34 220 1.04 1.61 500 1 2.1 1000 0.99 3.1 2000 0.995 6.07 5100 0.973 11.3 10000 1.019 20.6 20000 9.75 22.2 100000 0.219 Fig 1.4.3

To determine Io and gmf we used the following.

Io

Vo  VL RL

g mf 

Io Vs

These values can be seen in figure 1.4.3. A plot of Transconductance vs. Load Resistance is shown below.

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Gmf (mA/V) 0 0.962 0.971 0.99 0.975 0.954 1.02 0.952 0.731

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Transconductance vs. Load Resistance 1.2

1

0.8

te u d o c s n ra T

0.6

Series1

0.4

0.2

0 0

220

500

1000

2000 5100 Resistance (Ohms)

10000

20000

100000

Fig 1.4.4 Form the table and graph we are able to see that the gmf remained relatively constant until very large.

RL became

( 100k ) .

Section 1.5 Shunt/Shunt The fifth section of the experiment asked us to design for a midband open circuit gain of 100K for the respective Shunt/Shunt feedback circuit shown in figure 1.5.1 and then to measure the midband transresistance for various resistive loads. In this circuit we once again approximated the necessary current source as a voltage source in series with a large resistor. We used a 1M ohm resistor that was chosen arbitrarily.

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0

15Vdc V2

7 1

U 1 V2

R 4

3

+

2 V1

1Vac 0Vdc

1M

Vn

4 5

0

Vo

6

U A741 R 1 Load

V4 R 3

100K V3

0

15Vdc

0

0

Fig 1.5.1 We then proceeded to determine the necessary value of R f .

Vo  Is  0 Rf Vs  Rf Is  R f  100k With the circuit design completed and the circuit built we were able to determine the transresistance as a function of various resistive loads as follows: Transresistance vs Load V1 (V) 2.25 2.207 2.201 2.201 2.203 2.2 2.2

Vn (V) 9m 8.2m 5m 5m 4m 2.1m 4m

Vo (V) Is (A) 0.2171 2u 0.2171 2u 0.2172 2u 0.2174 2u 0.2174 2u 0.2174 2u 0.2176 2u Fig 1.5.2

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Rl (Ohms) Rf (Ohms) 0 96876.4 10 98690.2 50 98907.1 100 98998.2 1000 98863.1 10000 98912.6 100000 99089.3

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Here we calculated

I s and R using the following. Where R  1M  . Vn  V1 R Vo Rf  Is Is 

These values are then displayed in figure 1.5.2 A plot of Transresistance vs., Load Resistance is shown below. Transresistance vs. Load Resistance 99500 99000 98500 98000

itc e s n ra T

97500

Series1

97000 96500 96000 95500 0

10

50

100 1000 Resistance (Ohms)

10000

100000

Fig 1.5.3 From the table and graph we are able to see that the transresistance vs. load remains relatively constant and is indeed consistent with results form circuit theory.

Section 1.6 Frequency Response The sixth section of the experiment asked us to take two Series/Shunt amplifiers and cascade to provide an overall feedback to make the overall voltage gain about 15 at the midband. See figure 1.6.1. This was very similar to the design process of section two only here we cascaded two Series/Shunt amplifiers together. Here the specified gain of the individual amplifiers was to be 15. This meant that the same resistance values we used for the Series/Shunt amplifier in part two could be used here as well. Additionally, the overall gain was to also be 15. This meant that the same resistor values could be used for the overall gain control as the individual stages. Thus, each stage of this amplifier was to have the same gain.

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V3 15Vdc

V4 15Vdc

0

0 R 3

R 2 14K U A741

U A741

4 5

R 4

14K

2

4 5

-

3

6

1K

3

7 1

Vo

6

7 1

+

R 1 1K

-

Vi

0

+

2

U 2 R 5 14K

U 1

V2

V1

15Vdc

15Vdc

0

R 6 1K

0

0

Fig 1.6.1 Once we had the circuit constructed we could then investigate the voltage gain vs. frequency relationship. Gain vs Frequency

Frequency (Hz) Vi (V) Vo (V) 1000 0.0455 0.72 5000 0.0461 0.732 10000 0.0461 0.73 25000 0.0471 0.729 50000 0.0477 0.745 100000 0.0488 0.837 125000 0.0495 0.89 125000 0.0498 0.904 140000 0.0499 0.981 160000 0.0512 1.09 170000 0.0518 1.189 180000 0.0518 1.308 190000 0.0527 1.423 200000 0.0533 1.428 210000 0.0535 1.376

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Gain 15.82 15.87 15.83 15.47 15.62 17.15 17.98 18.15 19.66 21.29 22.99 25.25 27.6 26.79 25.72

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220000 240000 260000 280000 300000 320000 340000 400000 500000

0.0539 0.0529 0.0525 0.0504 0.0492 0.0482 0.0471 0.0445 0.0425

1.31 1.17 1.029 0.91 0.8 0.705 0.613 0.415 0.239

24.3 22.12 19.6 18.05 16.26 14.62 13.01 9.33 5.63

Fig 1.6.2 A plot of Voltage Gain vs. Frequency is shown below.

VoltageGain Vs. Frequency 30 25 20

in G e g lta o V

15 Series1 10 5 0 1000

10000

100000

1000000

Frequency (Hz)

Fig 1.6.3 In addition to investigating the overall feedback of the amplifier we were also to determine the quality factor for the circuit. This was done by determining the bandwidth and resonance frequencies and then solving for Q.

Q

fR Bw

109k (280k  125k ) Q  1.2258 Q

The final part of this section asked us to observe the output, given a square wave input, as a function of frequency. This was quite simple and the results were as expected. We observed that as frequency increased the output transformed from a square wave into a sine wave.

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Stability The seventh section of the experiment asked us to place three Series/Shunt amplifiers in series and then to provide an overall feedback to generate an overall midband voltage gain variable from 10 to 100. We were to then investigate the stability of the amplifier as a function of the gain. To accomplish this we had to make calculations similar to those in part seven of the experiment, only now we had three amplifiers in series instead of two. Here, once again, the gains of the individual stages remained the same as two. We were told to design for a midband variable voltage gain from 10 to 100. To accomplish this we placed a potentiometer in place of resistor R9 so we could adjust the feedback of the circuit and thus the gain. The calculations for this were actually quite simple.

@ A f  10    0.1  0.1 

R9 R8  R9

Letting R8  100 K  and solving for the necessary sized potentiometer yielded The resultant circuit design can be seen in figure 1.7.1.

V3 15Vdc

R9  10 K 

V5

V4 15Vdc

15Vdc

0

0

0

R 10 R 3 R 2

3

7 1

U 1

7 1

+ R 4 1K

6

3

Vo

6

U 3

R 8 100K

0

V2

V1

R 9 1K

V6

15Vdc

0

R 7 R

U 2

0

15Vdc

4 5

4 5

6

7 1

-

R 1 1K

3

2

+

2

-

4 5

2

+

U A741

-

14K

Vi

14K U A741

14K U A741

15Vdc

0

0

-20-

0

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Fig 1.7.1 The goal of this part of the experiment was to ultimately investigate the stability of the cascaded amplifiers. When a square wave was inputted to the circuit the output was clearly unstable. It could be seen that the output was not a perfect square wave and that continuous ringing was occurring. This instability was indeed a problem and needed to be eliminated in order for the circuit to have any practical use.

Compensation The eighth section of the experiment dealt with dominant pole compensation and asked us to design the circuit to be stabile with a phase margin between 45 and 90 degrees. Here we needed to determine where to place the dominant pole. To accomplish this we determined the following values at resonance. 34 KHz, Av=29,

  1

Next we found the 45 degree phase margin and determined the same information as previous. 124.83 KHz, Av 7.9,   135 Now using this information we could plug into the following equation and solve for the dominant pole FD .



f    FD 

Av1  Av 2  20 log  Plugging in the appropriate values and solving for

FD yields.  124.83k   FD  

29  7.9  20 log   FD  10.98Hz

With the dominant pole found we could then calculate our capacitor and resistor values necessary to give us our dominant pole compensation.

FD  Choosing

1 2 RC

C  4.7uF arbitrarily we can then solve for R. R

1 2πFD C

1 2π * 4.7 µ * 10.98 R  3 K R

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With the appropriate values determined we were then able to insert the new pole between Op Amps two and three as shown in figure 1.8.1.

V3 15Vdc

V4 15Vdc

0

14K

+ 7 1

U1

7 1

4 5 11

R4 1K

0

0

V2 15Vdc

C1 4.7uF

U2

R7 R

2 3

U3

V6

15Vdc

Vo

R8 100K

0

V1

0

6

7 1

4 5

4 5

6

+

3

-

6

R11

+

3

2

-

2

UA741

UA741

UA741

0

R10

14K

14K

R1 1K

0

R3

R2

Vi

V5 15Vdc

R9 1K

15Vdc

0

0

0

Fig 1.8.1 With the dominant pole compensation completed and inserted into the circuit we were able to determine the bandwidth of our new compensated amplifier. Gain & Phase vs Frequency

Frequency (Hz) Vi (mV) 1 256 10 256 100 256 500 256 1000 256 2000 256 3000 256 5000 256 10000 256 15000 250 30000 250

Vo (V) 25.3 25.3 25.3 25.3 25.3 25.3 25.3 25.3 22.1 14.4 8 -22-

Gain 98.8 98.8 98.8 98.8 98.8 98.8 98.8 95.8 86.31 56.25 31

Phase (degrees) 0 1 2 3 6 18 22 35 58 100 133

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___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Fig 1.8.2 Plots of Frequency vs. Gain and Phase Shift are shown below.

FrequncyVs. Gain 120 100

in a G

80 60 40

Series3

20 0 1

10

100

1000

10000

100000

Frequency (Hz) Fig 1.8.3

PhaseShift Frequency (Hz)

) rs g e i(D h P

1

10

100

1000

0 20 40 60 80 100 120 140

10000

100000

Series1

Fig 1.8.4 Viewing the graphs we can easily see that the amplifier with compensation was indeed stable while maintaining good bandwidth.

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EE3102 LAB RE PO RT

EX P#1 2007

FEB

___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __

Oscillators The final circuit was to design and construct a 500 Hz Sinusoidal oscillator (see Figure 1.9.1). This was to be powered by 15 volt supplies and have an output of 5V. With these design criteria in mind we designed and built the following circuit:

0 V2 D2 15Vdc 10K POT

R2 10K D1

0

4 5

UA741 -

3

+

C1

R4

10nF

32K

U1

V1

0

15Vdc

0

Fig 1.9.1 To design for 500 Hz we made the following calculations.

f 

Vo

6

7 1

2

1  500 2π RC

Choosing C=10nF

1 1  2 fC 2 500* 20n R  32k R

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C2

R3

10nF

32K

EE3102 LAB RE PO RT

EX P#1 2007

FEB

___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ __ Therefore the values used were as follows.

C1  C 2  10nF R1  R2  32 K

To provide the stabilization we added the two diodes in parallel with a 10K resistor. The last requirement was to have an output amplitude of 5 V. This was achieved by placing a 10K potentiometer in the circuit as shown in figure 1.9.1 to control the feedback and therefore the gain of the circuit. The potentiometer was then adjusted until the circuit was operating at the desired 5 V. The actual frequency of the Wein Bridge was not exactly 500 Hz, but rather 522 Hz. This was due largely to the tolerances of the parts used and the inherent mismatches that resulted. This was the only flaw with the Wein Bridge the circuit performed as expected producing a near perfect sine wave.

Conclusion: Throughout this experiment we investigated various forms of feedback and its effects. We observed, that all forms of negative feedback, were relatively unaffected by changes in load resistance. In other words the gains for the different amplifiers remained constant. This can be seen through the various plots of Gain vs. Load Resistance. Next we studied cascaded amplifiers. Here we observed gain peaking in a double cascaded Series/Shunt amplifier and demonstrated that it has a very low quality factor of 1.2. Next we studied the stability of triple cascaded Series/Shunt amplifiers. Here we observed that the amplifier was highly unstable, thus requiring dominant pole compensation to stabilize the amplifier. Finally, we designed and constructed a Wein Bridge sinusoidal oscillator. This was an application of positive feedback where as all of the previous implementations had been negative feedback. Overall the concept of feedback for differential amplifiers is crucial in designing many of today’s electronics. Without it many designs would not be possible or would require far more complicated and expensive circuitry. Thus, this experiment hereby demonstrated the functionality and effectiveness of the feedback network in circuit design.

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