Digital Design Using Mux

Digital Logic Design Lecture # 9 University of Tehran

Outline     

MSI Parts as a Decoder Multiplexer Three State Buffer MSI Parts as a Multiplexer Realization of Switching Functions Using Multiplexers

MSI Parts as a Decoder 



Up till now, we saw a modular component named as a decoder. Let’s now see what standard modules with that functionality are available. 74138: This standard decoder is the most used in between the MSI decoders. It has active-low outputs, and one of the enable inputs is also active-low, while the other two are active-high. There is no particular reason to why they are 3 enable inputs other than obeying the standard number of pins these packages have. 7

4

1

Y Y

A

1

B C G

1

G G

2 2

3

:8

3

8

0 1

N N

Y Y Y

2 3 4

N N N

AY BY Y

N5 N6 7

N N N

E

C

D

O

D

E

R

MSI Parts as a Decoder (continued…) 

74154: As in the 74138, this package also needs activity of both enable pins to work. 7

4

1 O

O O O O O O

A B

O

C D G

1

G

2

2

D

O O N O N O O O

5

4

0 1 2 3 4 5 6 7 8 9 1 1 1 1

N N N N N N N N N N 0 1 2 3

N N N N

O

1

4

N

O E

1 C

5 O

N D

E

R

MSI Parts as a Decoder (continued…) 

74139: This decoder is often called a dual 2-to4 decoder and is actually just two 2-to-4 decoders in one chip. 7 A B A B G G 3

2

4

1

Y Y Y Y Y N Y N Y Y

1 1 2 2 1 2 :4

3

1 1 1 1 2 2 2 2 D

9

0 1 2 3 0 1 2 3 E

C

N N N N N N N N O

D

E

R

Multiplexer 

Data is stored as bytes in computer memory. When discussing data transport, a lot of wiring would be needed to be able to move 8 bits of a byte in parallel. Trading cost for performance we use serial connections to transport one bit of data at a time. This means we share a transition line between the source and destination.

Multiplexer (continued…) 

For instance, in the following diagram, the transition line works of 1ms between A and A’ and then changes position as the next bit move on. In this diagram the first box is a multiplexer and the second a demultiplexer. The multiplexersMultiplexer we discussDemultiplexer have no memory. A B C D

A’ B’ C’ D’

Multiplexer (continued…) 

Let us consider such a module with one output and four inputs, where one of the four inputs must be selected for output through 2 selection lines. MUX I0 I1 I2 I3

y

S1

S0

S1 0 0 1 1

S0 0 1 0 1

y I0 I1 I2 I3

Multiplexer (continued…) 

To observe the gate level design of such structures, let’s consider a dual 4-to-1 MUX S1 S0 and show its design: S1 S0 } 0/3

1I0 1en

1en 1I0 1I1 1I2 1I3 2en 2I0 2I1 2I2 2I3

1I1

1y

1I2

1y

1I3 2I0 2en 2I1

2y

2I2 2I3

2y

Multiplexer (continued…) 

We need to be able to construct larger multiplexer modules by cascading smaller ones. This cascading is done by using the enable inputs of our smaller modules as shown in the following figure: S S S 2

1

0

S1 S 0 } 0/3

a b c d

1en 1I0 1I1 1I2 1I3

1y y

e f g h

2en 2I0 2I1 2I2 2I3

2y

Multiplexer (continued…) y1



Recall the structure can be used as y a 1-to-2 decoder which has been used to choose the particular 4-to-1 MUX to be enabled in the last example. That is when s2=0 the upper package is working and when s2=1 the lower one. We could have used a 2to-1 MUX to choose between 1y and 2y and use s2 as the selector. 0

Multiplexer (continued…) 

Let’s observe different structures of a 2-to-1 MUX: I1

s

s 4 6 4 6

I0 6

y

I1 y

4

I0 1

2

Multiplexer (continued…) 

About the second structure as a MUX shown in the last slide it must be mentioned that it would have been logically correct use a PMOS transistor instead of the inverter and NMOS, but PMOS transistors are much slower than the same size NMOS transistors, so this structure is preferred (this structure uses the level before as its power supply).

Multiplexer (continued…) 

Multiplexers can be used in the design of both complex circuits and also realization of primitive gates such as XOR and AND gates. 

XOR gate: If we look at an XOR gate’s functionality a little differently, we can easily see that when one input is 0 the other is simply propagated through and when one is 1 the other is complemented. Using a multiplexer to realize this, is shown in the following figure. This realization uses only 6 transistors if we use the second method used for a 2-to-1 MUX a a b yusually consist whereas XOR gates of 8 transistors. 0 0 1 1

0 1 0 1

0 1 1 0

b

0 y

-

b

1

Multiplexer (continued…) 

AND gate: Again we use only 4 transistors instead of the usual 6 used for an AND gate. a 0

0 y

b

1

a 0 0 1 1

b 0 1 0 1

y 0 0 0 1

Three State Buffer 

Another useful and primitive component in digital circuits is the three state buffer: c 0 0 1 1



a 0 1 0 1

y Z Z 0 1

c(control) ENB

y(output)

a(input)

This three state buffer lets it’s input through to the output when the control is 1 and give a high impedance output otherwise.

Three State Buffer (continued…) 

Different three state buffers that are used, are listed below: ENB

ENB

ENB

buff if 1

buff if 0

ENB

not if 1

not if 0

Three State Buffer (continued…) 

Let us know use our knowledge of three state buffers to construct other structures that realize multiplexers and observe some new concepts. Thus for aI 4-to-1 MUX, we have: ENB 0

I1

ENB

I2

ENB

I3

ENB

en 0 1

y0 y1 y2 y3

Three State Buffer (continued…) 



Note: It must be taken to consideration that a wired OR structure can only be used when we have three state lines. We can do cascading on packages with three state outputs with the same type of ORing: a b c d

en I0 I1 I2 I3

y S1

e f g h

en I0 I1 I2 I3

y S1

S2 S 1 S0

S0

S0

Shows three state outputs

MSI Parts as a Multiplexer 



Let us now see some standard multiplexer packages. 74153: It’s clear that this package is a dual 4to-1 multiplexer. 7

4

1

5

3

A

1

B 1 1

G C

N 0

1 1 1 2 2

C C C G C

1 2 1 3 2 N 0

2 2 2

C C C

1 2 3

M

U

L

Y Y

T

IP

L

E

X

E

R

MSI Parts as a Multiplexer (continued…) 

74157: This is a quad 2-to-1 MUX with common select and enable inputs. Outputs are not in three state. 7

2

4

S A B A

E 1 1 2

B A B A B G

2 3 3 4 4 N

M

1

5

7

L

U

Y Y Y Y

L

1 2 3 4

T

IP

L

E

X

E

R

MSI Parts as a Multiplexer (continued…) 

74251: This is an 8-to-1 MUX that gives us the complemented form of the output too. The outputs are three state and the last level of the MUX can be seen below: 3

G D D D D D D D D A B C M

7 N 0 1 2 3 4 5 6 7

U

4

2

W

5

1

N Y

L

T

IP

L

E

X

E

R

EN B

y

... WN

MSI Parts as a Multiplexer (continued…) 

Note:

ENB

Realization of Switching Functions Using Multiplexers 

Multiplexers can also be used to realize more complex switching functions, for example we will now realize a full adder using a 74153 multiplexer module. a

cin

a 0 0

b

F . A. sum

cout

0 0 1 1 1 1

b 0 0 1 1 0 0 1 1

cin 0 1 0 1 0 1 0 1

co 0

S

0 0

1 1

1 0 1 1 1

0 1 0 0 1

0

Realization of Switching Functions Using Multiplexers (continued…) ab cin

00

01

11

10

0

0

1

0

1

0

1

1

1 cin

2

0

3

6 7

1

cin

cin

00

01

11

0

0

0

1

1 1 0

0

2 3 cin

1

6 7 1

0

5

S

cin

ab cin 0

4

10 4

1

5 cin

0 1 co

Realization of Switching Functions Using Multiplexers (continued…) a b

cin cin

0 cin 1

0 1 } 0/3 en 0 1 2 3

S

en 0 1 2 3

co