Module no.
Course contents (Total Detail of course lectures) (number of lectures) History and technology trends, Overview of CMOS Clean room process, Clean room procedures, IC fabrication flow. Crystal structure, Czochralski, FloatCrystal growth, Wafer Zone growth manufacturing methods, Wafer specification, Crystal characterization Wet and Dry oxidation, Growth Silicon Oxidation kinetics and Models, Quality, Characterization. Light sources, Optical lithography, Photoresist types, Mask making, Lithography Advanced Lithography techniques and their comparison. Dry and wet etch techniques. Si Etching etching , Plasma etching, Reactive Ion Etching. Diffusion equations and profiles, Diffusion Modeling concentration dependent diffusion. Chemical Vapor Deposition, Molecular Beam epitaxy, Thin film deposition Epitaxial defects, low and high dielectric deposition, Poly deposition. Ion channeling, Ion Implantation Implant damage, Annealing. Physical and chemical vapor deposition, Al Metallization and Cu metallization, Silicide formation. Process Integration, Introduction to Yield Bipolar, BICMOS,
and MEMS technology, Planarization, Multichip modules and packaging. Introduction
CAD tools and methodology, Notations, symbols, and terminology, Example of analog signal processing and analog ICs.
Review of IC technology, device modeling and layout
Modeling of BJT and MOS devices, BJT and MOS fabrication technology, Basic IC layout and passive components
Basic analog subcircuits
MOS switch and resistor, Current sources/sinks and current mirrors, Design of basic amplifiers, Current and voltage references Time and frequency-domain analysis, Noise models for IC devices, Noise analysis examples Non-ideal characteristics of opamps, Design of twostage opamps, Stability and frequency compensation
Noise analysis and modeling Basic operational amplifier (opamp) design Comparators
Characterization of a comparator, Bipolar comparators, CMOS Comparators
Integrated filters
Opamp-RC filters, MOSFET-C filters, Gm-C filters, Switched-capacitor filters
Introduction to data converters
Characterization and definition of data converters, Nyquist-Rate Digital-to-Analog Converters, Oversampled Converters
Introduction
Historical Review, Issues Integrated Circuit Design, Quality Metrics
CMOS Devices Integrated Circuit Interconnect
CMOS Inverter Logic Function
CMOS Combinational Logic Design o
MOS Capacitor, MOS Diode, NFET and PFET Large Signal I-V Relations, DC and Transient Modeling and Simulation, Device Scaling o RLC Characteristics of Interconnect o Modeling (lumped RC, distributed RC, transmission line), DC and Transient Modeling and Simulation Scaling DC Transfer Functions, Static and Dynamic Characteristics, DC and Transient Modeling and Simulation, Logic Design Prototypes (CMOS, pseudo-NMOS, Diode), Design Optimization (noise margin, area, power, delay) Single Output /Multiple Input (NAND, NOR, XOR), Multiple Output/Multiple Input (Adder, Mux/DeMux), Static and Dynamic Design, DC Transfer Functions, Static and Dynamic Characteristics, DC and Transient Modeling and
CMOS Sequential Logic Design o
o o o
Introduction
Simulation, Design Optimization (logic style, noise margin, area, power, delay), Next Generation and Scaling o CMOS Latches and Flips-Flops, Monostable and Astable Circuits, Static and Dynamic Design, DC Transfer Functions, Static and Dynamic Characteristics, DC and Transient Modeling and Simulation, Design Optimization (logic style, clocking, setup time, hold time, area, power, delay), Next Generation and Scaling o o o
o
Logic synthesis
o o
o
Physical design automation
o
o
VLSI design flow, challenges. Verilog/VHDL: introduction and use in synthesis, modeling combinational and sequential logic, writing test benches. Two-level and multilevel gatelevel optimization . Binary decision diagrams. Basic concepts of high-level synthesis, partitioning, scheduling, allocation and binding. Technology mapping. VLSI design styles, full-custom, standard-cell, gate-array and FPGA, Physical design automation algorithms, floor-planning, placement, routing, compaction, design rule check, power and delay estimation, clock and power routing, Special considerations for analog and mixed-signal designs.
Digital domain
Succesive approximation
Deltasigma
SAR Oversampling
Digital calibration
Timeinterleaving
Offset compensation (Flynn et al)
Without calibration (cao et al, 2009) SAR
Time-domain processing Switched current reference source (yang & sharpeshkar, 2005, 2006).
With background calibration (alpman et al., 2009) Additional comparators with background calibration (kijima, ito et al. 2009)
Input reference generation from comparator offset (sundström & alvandpour, 2009)
Recursive successive approximation algorithm in the time domain (jimenez-irastorza et al. 2011)
N-bit flash quantizer replaced by asynchronous comparator ((Colodro & Torralba, 2008). )
Analog reduction
Switched op-amp
4th order band-pass ΣΔ modulator using two switched opamps (kuo & liu, 2004).
Op-amp sharing
Op-amp for two adjacent stages in successive alternative phases(hashemi & shoaei, 2007; sasidhar, 2009)
Biasing
Op-amp less
CBSC (comparator based switched capacitors) technique(fiorenza et al., 2006) Pipelined ADC based on zero-crossing detector (shin et al. 2008; brooks & lee, 2009)
ADC array using charge redistribution architecture (draxelmayr, 2004)
Comparator based flash ADC structure (van der plas, 2006)
Inverter based ΔΣ modulators Assisted op-amp and helper techniques Hybrid ΣΔ modulator fabricated in 65nm CMOS technology (van veldhoven et al., 2008)
(Chae & han, 2009) the inverter behavior used as an extremely simple amplifier
FA
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T15 T14 T13 T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0
b3
c1
d0
b2
Bit3 (MSB) c0
b1
c1c0
Bit2
b3 b0 b2 b1 b0
Bit1
T15T13T11 T9 T7 T5 T3 T1 Bit0 (LSB)
Bit3 = d0 Bit2 = c0 + c1 Bit1 = b0 + b1 + b2 + b3 Bit0 = T1 + T3 + T5 + T7 + T9 + T11 + T13 + T15
V+
Vin 00000000111111111
(2n-1) to n encoder
n -bit
VResistor string
Thermometer to binary encoder Comparator array Thermometer code
IC Fabrication
Fundamental theorey , Process indepth analysis
Analog IC design
Digital IC Design
Custom IC design skills, Digital IC design skills, Programming skills VLSI CAD
Comprehensive design practice Projects
1.0
0.9
Vm
0.8
0.7
0.6
0.5
0.4 0.01
0.1
1
Wp/Wn aspect ratio
10
100