Dalius Baranauskas Phd Theses Summary

VILNIUS GEDIMINAS TECHNICAL UNIVERSITY

Dalius Baranauskas [email protected]

SELF-PROTECTED BIPOLAR TRASISTOR SYSTEMS

Summary of doctoral dissertation technical science, electronics and electrical engineering (7C)

Vilnius, 1997

Doctoral dissertation is prepared at Vilnius Gediminas Technical University during 1995 - 1997. The right of doctor’s degree honoring is granted to Vilnius Gediminas Technical University by the government of Lithuanian Republic by its decision N 739 on October 7, 1992. Doctor’s study committee: the head of the comity and scientific advisor of the work: prof. habil. dr. Albinas MARCINKEVIÈIUS (Vilnius Gediminas Technical University, technical science, electronics and electrical engineering, 7C); members: doc. dr. Algirdas AULAS (Semiconductor Physics Institute, technical science, electronics and electrical engineering, 7C); prof. habil. dr. Zigmantas JANKAUSKAS (Vilnius Gediminas Technical University, nature science, physics, 2F). prof. habil. dr. Raimundas KIRVAITIS (Vilnius Gediminas Technical University, technical science, electronics and electrical engineering, 7C); prof. habil. dr. Arûnas KROTKUS (Semiconductor Physics Institute, nature science, physics, 2F); Official opponents: prof. habil. dr. Danielius EIDUKAS (Kaunas University of Technology, technical science, electronics and electrical engineering, 7C) doc. dr. Julius SKARDÞIUS (Vilnius Gediminas Technical technical science, electronics and electrical engineering, 7C)

University,

Doctoral dissertation will be defended at the meeting of doctoral study comity on October 21, 1997. Address: Electronics Faculty, Auðros Vartø 7a., Vilnius Gediminas Technical University, Vilnius, Lithuania. Doctoral dissertation may be found at the library of Vilnius Gediminas Technical University. The summary was sent away on ....................................... , 1997. Darbas atliktas 1995-1997 m. Vilniaus Gedimino technikos universitete.

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Doktorantûros teisë Vilniaus Gedimino technikos universitetui suteikta Lietuvos Respublikos vyriausybës 1992.10.07 nutarimu Nr. 739. Doktorantûros studijø komitetas: pirmininkas, mokslinis darbo vadovas: prof. habil. dr. Albinas MARCINKEVIÈIUS (Vilniaus Gedimino technikos universitetas, technikos mokslai, elektronika ir elektrotechnika, 7C); nariai: doc. dr. Algirdas AULAS (Puslaidininkiø fizikos institutas, technikos mokslai, elektronika ir elektrotechnika, 7C); prof. habil. dr. Zigmantas JANKAUSKAS (Vilniaus Gedimino technikos universitetas, gamtos mokslai, fizika, 2F). prof. habil. dr. Raimundas KIRVAITIS (Vilniaus Gedimino technikos universitetas, technikos mokslai, elektronika ir elektrotechnika, 7C); prof. habil. dr. Arûnas KROTKUS (Puslaidininkiø fizikos institutas, gamtos mokslai, fizika, 2F); Oficialûs oponentai: prof. habil. dr. Danielius EIDUKAS (Kauno technologijos universitetas, technikos mokslai, elektronika ir elektrotechnika, 7C) doc. dr. Julius SKARDÞIUS (Vilniaus Gedimino technikos universitetas, technikos mokslai, elektronika ir elektrotechnika, 7C)

Daktaro disertacija bus ginama 1997 m. spalio 21 d. doktorantûros studijø komiteto posëdyje. Adresas: Elektronikos fakultetas, Auðros vartø 7a., Vilniaus Gedimino technikos universitetas, Vilnius. Su daktaro disertacija galima susipaþinti Vilniaus Gedimino technikos universiteto bibliotekoje.

Disertacijos santrauka buvo iðsiuntinëta 1997 .................. mën. ...... d.

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GEERAL CHARACTERISTIC OF THE WORK Actuality The protection of bipolar especially power transistors (PT) against overcurrent, over-voltage and over-heating is a serious problem in microelectronics. The development of new electronic components attention is paid to the problems of their reliability, occupied space, necessary technology for fabrication, price and to their control optimization. Circuit and layout means for integrated circuit (IC) protection are integrated on the same chip for IC protection against breakdowns caused by the over-loads. Several additional components are necessary to realize the protection system requires just a little part of the total chip area. The protection means integration by using the same technological processes ensures economical effectiveness as the whole IC reliability increases. Particular aspects of protection against overloads that are considered in the scientific-technical publications do not make up the totality of the methods and rules of protection system design. System application is mostly based on the experimental results not on the cheaper computer analysis, because of the disadvantages of the software available. Protection systems considered also have many shortcomings, such as: not enough protection accuracy, additional technology steps required for implementation, low usage of transistor power dissipation possibility, high waste of power. New protection system alternatives for overcoming the above-mentioned problems are necessary. As the protection function links together the bipolar transistor under protection and the protection circuitry into a system, a generalized view of the system is required to find the ways to improve the system performance and to solve the problems mentioned. These systems are referred to as SelfProtected Systems in the thesis. It is necessary to develop the design and analysis methods of the systems by taking maximum advantage of personal computers to ensure economical efficiency. The development of new systems should be based on computer analysis results and concentrated in the field of circuit and layout approaches avoiding the introduction of expensive new components and technologies. The purpose of the work New self-protected systems should be introduced, that would allow an increase in the protection accuracy of the existing systems, ensure simpler technology to be required for implementation, to increase usage of transistor power dissipation possibility and decrease the waste of power. 1. New approaches of systems self-protected against current overloads, should be introduced that would allow: a decrease in power losses compared with existing systems, as a result ensuring the possibility of system application in high current circuits. New approaches should be introduced that would expand the control and interconnection opportunities of the systems.

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2. Systems should be proposed that enable self-protection against local and total chip thermal overloads, enable minimization of additional power losses and to be realizable by using simplest IC fabrication technologies. PT structures with integrated temperature sensors should be presented for self-protected system analysis. Simulation techniques of temperature distribution in semiconductor chips should be introduced. 3. Positive thermal feedback compensation approach that enables an increase in current equality in PT layout that in turn increases the resistance to secondary breakdown should be presented. An example of the proposed approach application by using simplest IC technology should be presented. 4. A system self-protected against voltage overloads that would decrease the variation of protection switch ON corner of ational Semiconductors IC LM12 due to parameter variation of technological process should be presented. A simulation technique that would enable the system analysis based on experiments to be replaced by computer analysis should be presented. 5. Functional blocks of self-protected systems: voltage and current reference as well as special amplifier circuits that provide the means for self-protected system implementation should also be proposed. Scientific novelty Methodology of computer based analysis, design and implementation on integrated circuits of systems self-protected against electrical (current and voltage) and thermal overloads is presented. The methodology development led to a number of results also having the scientific novelty. Technique of PT layout and integrated sensor place optimization that is based on simulation of temperature distribution in these layouts is presented. Simulation is performed by applying a standard software TXYZ which was modified to enable the simulation by using a PC. Simulation results were analyzed by making the use of software SURFER that allowed the results of static temperature distribution to be presented in graphical form: three dimensional, projection onto a plane, fields of isotherms. PSPICE macro-models that add thermal links between circuit components are introduced. This takes into account the back-impact on component parameters and circuit functioning of the temperature increase due to dissipated power. The technique of self-protected system simulation based on macro-models is also presented. Static and dynamic thermal processes simulation is made possible in sophisticated electronic circuits by linking the components simulated using proposed macro-models by electrical equivalents of thermal RC circuits. The impact of dissipated power in ordinary components is taken into account by making the use of controlled current and voltage sources. Simulation results when macro-models are used indicate a qualitative improvement of simulation accuracy comparing with the case when PSPICE built-in models are used. The simulation results are also in agreement with the measurements. This makes possible the

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experimental analysis of on-chip systems self-protected against thermal overloads and the mechanism of positive thermal feedback compensation to be replaced by the PC based analysis. Bipolar transistor macro-model that provide the means for bipolar transistor avalanche breakdown simulation is also proposed. The macro-models make possible the simulation technique of system self-protected against voltage overloads to be developed. Thus, the system analysis may be based on simulation instead of experiments performed on fabricated systems. The validity of the macro-models and simulation techniques are verified by experiments. The results show good matching between the experimental and simulation results. The thesis summarizes into a methodology the self-protected system development of new design ideas for systems self-protected against voltage, current and thermal overloads, the blocks necessary for their implementation and proposals for current equality increasing to increase the resistance of PT to secondary breakdown. Practical importance System self-protected against current overloads proposed in the thesis makes it possible to exclude the ballast resistors from the PT emitter circuit and consequently to eliminate additional power losses in it, as well as to avoid additional technological processes for resistor formation. This makes it possible to apply the system in case of high current in PT emitter circuit. Methods of current elements interconnection and application in push-pull output stages of integrated circuits are proposed. The approaches presented also suggest system level ways for bipolar transistor “inherent” positive thermal feedback elimination. Output voltage dynamic range expansion and improvement of switching speed suggest wide area of application of the circuits presented. A system which is equivalent to a bipolar transistor, however, features the stability and linearity of current transfer ratio in case of technological parameter variation was also presented. Selfprotection of the system is accomplished by limiting the maximal current in the input. A few PT with integrated sensors for the development of new system selfprotected against current and thermal overloads were designed and fabricated. A circuit approach for a system self-protected against thermal overloads that allow to make the use of a transistor as a sensor that have base and collector areas connected to the same areas of PT. The system offers increased accuracy of selfprotection in case of the danger of local or total overheating of PT, small variation of self-protection corner in case of technological parameter variation, possibility to use simplest technology for implementation and possibility to decrease the power losses by excluding a ballast resistor. A principle of compensation of positive thermal feedback in bipolar transistors was presented. A PT that allows an increase in current equality in the

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layout was built according to the principle presented and was designed and fabricated taking advantage of simple standard bipolar technology. A system self-protected against voltage overload that features reference transistor bias relying on the matching of current transfer ratio of two transistors was presented. The bias principle used makes possible to increase the accuracy of self-protection and to decrease the variation corner of self-protection switching ON in case of the variation of technological parameter. The system may be fabricated by making use of the simplest standard bipolar technology. A few blocks for self-protected system implementation were developed and presented in the thesis. A current amplifier features static current transfer ratio proportional to h21e 4 and has low power supply voltage which is the same as for a simple Darlington’s transistor. A current mirror proposed enables to increase the speed of p–n–p transistor based current mirrors. A differential current amplifier proposed features low input resistance, common mode signal rejection under minimal voltage supply. These circuits may also find wide application area in various ICs that need high speed and high static current transfer ratio under low voltage of power supply. A circuit of a current reference featuring low supply voltage ( 0,92 V ) which is essential in the self-protected system was also presented. Other features that make the circuit also suitable for wide variety of IC applications are: the high stability of the formed current, the wide range of variation of temperature and voltage coefficients including the sign of these coefficients. The macro-models presented in the thesis make possible to enlarge the area of application of standard circuit analysis software PSPICE to the bipolar transistor operation regions were avalanche carrier multiplication, thermal processes and thermoelectric interaction among components can not be neglected. This enables PSPICE application for simulation of a class of circuits that were not possible to simulate before. A few self-protected system application instances that are based on the simulation techniques using proposed macro-models, and the analysis technique of temperature distribution in IC chips were suggested. The self-protected systems and the functional blocks for their implementation are defended by 9 patents. Three more of them are published in Electronic Engineering journal Applied Ideas section. Publications and approbation There are 20 publications in total. Among them are: 7 articles, 9 patents, 4 research accounts. Some of the system principles and circuits proposed in the thesis are implemented on integrated circuits: IP–1, IP–2, IP–3. The certificate of the application of the integrated circuits is presented in the thesis (appendix N 1). The results of the thesis were also presented at following arrangements: seminar at

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Fincitec OY company, Kemi, Finland; seminar at Semiconductor Physics Institute, Vilnius, Lithuania; international seminars: MMMM’87 and MMMM’88, Palanga, Lithuania; scientific conferences: Elektronika’96 and Elektronika’97. The composition of the thesis The thesis consists of: content, abbreviations, introduction, 6 chapters, references (113 items), the list of publications related with thesis subject (20 items) and appendixes. The main thesis material is presented in 131 pages including 4 tables and 96 figures. SHORT COTET OF THE THESIS First chapter The aspects of bipolar transistor protection against electrical and thermal overloads, principles used and the protection systems are overview, Shortcomings of the existing protection methods and systems are disclosed and summarized. The bipolar transistor operating point should be secured in the safe operating area (SOA) to prevent transistor breakdown. SOA is defined by the maximum collector current, maximum power dissipation, secondary and avalanche breakdown. The maximum power dissipation limitation is defined by the maximum operating temperature of the PT junctions. PT breakdowns because of overloads that make up one third of total amount of breakdowns cannot be eliminated by taking into account the worst case operating conditions that are far away from nominal ones. The reservation increases system price and size. The enlargement of SOA limits is equivalent to the increase of reserve requiring: additional technological processes, IC chip area increase and transistor performance deterioration due to parameter optimization that defines SOA. However, these means cannot guarantee safe operation of transistors in case of unexpected damage in power supply or control circuitry. The increase of transistor resistance to secondary breakdown, however, has an exceptional importance because the elimination of the area defined by this phenomenon makes possible to decrease the number of SOA protection systems. The best method that provides the means for the safe operation of bipolar transistor is the integration of protection circuitry that monitors transistor operating point and switches it OFF or limits the control signal in case of the danger of exceeding SOA limit. The circuitry should be integrated on the same chip with the transistor under protection. The protection has to turn itself ON when there is a danger that the operating point may reach any of the SOA limits: maximum collector current (protection against over-current), maximal collector– emitter voltage (protection against over-voltage), maximum junction temperature (protection against over-heating).

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It is preferable to replace protection against power overload by temperature protection because the factor that causes transistor breakdown is not the dissipated power itself, but the subsequent temperature increase. The thermal resistance of the chip on which the transistor, under protection, is formed on, has less effect on protection accuracy. General shortcomings of the existing protection methods and means are: insufficient accuracy, requirement of sophisticated technologies or additional processes for their implementation, limitations of the highest current of protection switching ON, protection implementation deteriorates parameters of the other circuitry implemented on the chip. Considering the importance of the protection, the introduction of methods and means that would make possible the exclusion or reduction of some of the shortcomings listed have significant importance for up– to–date integrated circuits. The main shortcomings of protection against over-heating are following: not enough measurement accuracy of the PT junction temperature, low usage of transistor power dissipation ability, additional technological steps necessary for the implementation. Existing means and methods for the highest PT temperature estimation should be summarized to find the ways out from the mentioned problems by introducing new systems that could be integrated by means of the elementary technological processes and ensure small parameter variation. The most successful method of over-voltage protection is performed by shunting base-emitter junction of the transistor under protection. However, the system cannot ensure high accuracy in case of the component technological parameter variation of the circuitry that defines the operating point of the voltage sensor. A new approach is needed to overcome the above-mentioned shortcoming. The summarized reasons for the necessity of bipolar transistor SOA protection and the shortcomings of existing protection means and methods allows us to conclude that the importance of the new system, the ways and approaches for its development would provide the means to overcome the shortcomings. The term protection systems (circuits or circuitry) usually used in the scientific and technical literature would be more correct to replace in the thesis by the term self-protected systems (circuits or circuitry), as the protection object (bipolar transistor) and means (circuitry based on bipolar transistors) for the protection are considered as a whole being integrated on the same IC chip. The searche for approaches to solve the problems related with self-protected systems should be concentrated in the field of circuit and layout, rejecting the ideas requiring the development of expensive new transistor structures and technologies. Second chapter Original self-protected systems that allow the exclusion of shortcomings of existing over-current protection systems are presented and analyzed. The main factors, the proposed approaches are intended to solve are: low accuracy because

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of the variation of the corner of protection switch ON, the limitation for the highest protection current, additional technological processes required for implementation. A circuit approach based on application of additional emitter-sensor for the current detection enables high protection switching ON current level to be used. This approach also enables exclusion of the ballast resistor from the PT emitter circuitry that, in turn, excludes the power losses associated with the dissipated power on the resistor. Additional emitter-sensor used in the protection circuitry allows combination of current and temperature sensor functions and reduces the number of sensors required for self-protected systems. Methods of connection of current elements (CE) into linear and switching type push-pull output stages are proposed. The method also allow to enlarge the output voltage swing. If the circuit is used for TTL buffer function, the switching over time could be decreased below 100 ns , unlike TTL circuits, by using no additional technological processes. A circuit approach for a system self-protected against current overloads that features current transfer coefficient which is linear, well controllable and stabile in case of technological parameter variation. The circuit requires no additional technology processes for implementation. The application of local current feedback allows to achieve maximum circuit speed. As the CE features negative thermal feedback, system level compensation possibility of the bipolar transistor positive thermal feedback is provided. Third chapter Design approaches to increasing the functioning accuracy of system selfprotected against thermal overloads are presented. Static temperature distribution in IC chips analysis is presented. The analysis is performed by applying TXYZ standard temperature distribution simulation software that was adopted for making calculations by using PC. The text of the program is presented in appendix N 6. The result analysis was performed by making the use of software SURFER and TOPO. Temperature representation in three or two dimensional form as well as in the form of isotherms was made possible. This allows to perform detailed analysis of temperature distribution in an IC chip, PT layout optimization and the location of optimal place for the temperature sensor. The designs of three PT layouts with integrated additional emitters-sensors are fabricated. The temperature distribution in the PT chips is analyzed by making the use of the method presented. Most accurate temperature measurement by using emitter-sensor is performed in the H-type PT structure. The accuracy achieved is up to 73 % of the highest value, in the case of cooling conditions when the highest thermal gradients are formed on the chip. The accuracy of simulation of temperature distribution in the chips is confirmed by the measurements.

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PSPICE transistor and resistor macro-models that enable estimation of temperature increase because of dissipated power as well as thermal interaction between components are presented. Their parameter estimation technique is also proposed. Simulation results when proposed macro-models are used show a qualitative simulation accuracy comparing with the case when PSPICE “built-in” models are used. The technique for thermal circuit replacement by electrical equivalents in simulation by using PSPICE is proposed. The technique is based on the analysis of temperature distribution in IC chips and on the results of temperature dynamics measured by applying a pulse of dissipated power. The possibility introduced by the proposed macro-models of application of thermal circuits along with electrical makes possible to simulate thermal processes in complicated circuits including self-protected systems. This makes it possible to use computer-aided analysis instead of expensive design methods based on experimentation with test chips. An original system protected against thermal overloads is proposed (patent SU 1601742). According to the computer aided analysis, it provides accurate protection in case of local PT and overall IC overheating. PT local temperature is measured by making the use of the principal based on forward biased base-emitter junction voltage measurement. This method enables accurate temperature measurement and low variation of self-protection switching ON corner in case of the variation of technological parameter. As the current stabilization in emitter circuit of PT may be excluded, the ballast resistors in the circuits and associated power losses may also be eliminated. The self-protection method against local overheating used in the system unlike that used in power operational amplifier LM12 makes possible to use an additional emitter-sensor integrated in PT structure by using the simplest technology. The aforesaid results lead to a conclusion that the information presented in the chapter makes up the methodology of the design and development of system self-protected against thermal overloads. Fourth chapter Solutions of the problem of increasing the resistance to the secondary breakdown of bipolar transistors are considered. Bipolar transistor “inherent” positive thermal feedback compensation method by introducing local negative thermal feedback enables current equality to be increased in the PT structure layout and makes possible the design of secondary breakdown-proof bipolar transistors. Transistor and resistor PSPICE macro-models that enable taking into account dissipated power and thermal interaction among components impact on their parameters and circuit functioning proposed in chapter 3 are used for experimental methods replacement by computer aided analysis of the secondary breakdown resistant transistor structures.

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A structure of a bipolar PT that makes possible the increase of the current equality in the transistor layout was proposed (patent SU 1612874) and fabricated by using the simple epitaxial-planar technology. According to the simulation results, the PT enables to increase the current equality 2.5 times comparing with the closest F. Villa suggested approach. Measurements indicate 30 % of current transfer ratio increase comparing with the structure proposed by F. Villa which was implemented on the same chip for parameter comparison. This makes evident the effectiveness of the method proposed in the thesis. New transistor structures resistant to the secondary breakdown can be designed by making use of the design and simulation technique presented in this chapter. Fifth chapter A solution to the problem of increasing accuracy of self-protection against voltage overloads is presented and analyzed. The transistor macro-model and the technique for its parameter estimation allow the avalanche processes that causes the voltage breakdown in bipolar transistors to be taken into account in PSPICE simulation. Good agreement between simulated data and the measurement results indicate validity of the proposed macro-model. The possibility of PSPICE simulation of the avalanche multiplication phenomenon makes replacement of self-protected system analysis possibie based on experiments by computer aided analysis. The macro-model also makes possible the use of PSPICE for the simulation of other circuits where avalanche multiplication of carriers in base-collector region make significant impact on circuit performance. A system self-protected against voltage overloads (patent SU 1582264) was proposed. The operating point of the voltage sensor transistor is defined by using the advantage of the matching of the current transfer ratios of two transistors formed on the same chip. This method offers much higher protection operation accuracy comparing with the analogous system proposed by R. Widlar that is applied in IC LM12. Computer analysis of the proposed system and the system used in ational Semiconductor IC LM12 was performed by using the macromodel that takes into account the phenomena of carrier avalanche multiplication. Comparing the results obtained, the improvement of protection switching ON voltage corner variation because of the technological parameter variation may be decreased from ± 42 % till ±7 % , and from ±1.4 % till ±0.2 % for current corner. The system proposed may be fabricated by using the simplest technology. Thus, it may be integrated by using the same technology as the IC it is intended to be integrated into. Sixth chapter The implementation of the self-protected systems presented in 2, 3 and 5 chapters require to detail the amplifiers and reference circuits. The requirement of

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accuracy, stability, speed, minimum power supply voltage and simple implementation technology for the building blocks of self-protected systems led to a few original circuit approaches. A current amplifier circuit enables the static current transfer ratio proportional to the transistor gain raised to the fourth power to be obtained by making the use of multi-channel amplification approach (patent SU 1635248). At the same time, the minimum power supply voltage is equivalent to the saturation voltage of Darlington’s transistor. The speed of current mirror based on p-n-p transistors may be increased by making the use of a circuit proposed (patent SU 1656665). A differential current amplifier circuit (patent SU 1693715) featuring the combination of low dynamic input resistance, high rejection of common mode signal, and low power supply voltage is also presented and analysed in the chapter. These circuits may also be used in many other integrated circuits where minimum power supply voltage, increased operation speed and high static current transfer ratio is needed. Reference current formation circuit for self-protected system that makes it possible to ensure the requirements of stability and the adjustment possibility of reference current dependence on supply voltage, as well as temperature coefficient is also proposed. The same circuit enables to obtain three output currents. One of them is stable and two others have opposite signs of voltage dependence. The minimum value of the supply voltage is 0.92 V . This allows the circuit to be supplied directly from the collector voltage of a Darlington’s transistor. The temperature coefficient of the output voltage may be varied to obtain negative, positive or close to zero. These features of the circuit makes possible the application of the circuit in wide variety of electronic systems. A circuit of a voltage reference was also proposed. The output voltage and its temperature coefficient including the sign may be varied by adjusting the ratio of two resistors which is very stabile in case of technological parameter distribution. Along with the reference voltage, two reference currents having opposite temperature coefficients are formed. Two step voltage stabilization applied in the circuit makes possible to achieve better than 0,01 % / V stabilization of the output voltage. As follows from the presented data, voltage reference circuit may also be applied in many ICs. THE COCLUSIOS 1. A few design approaches of systems self-protected against current overloads were proposed. The systems make possible to decrease the power loses by using an additional emitter as a current sensor integrated in the structure of the PT. This allows to exclude the ballast resistor from the power emitter circuit and to get rid of the power losses in it. That makes possible the application of the

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system in high current circuits without using any additional technological processes for ballast resistor formation. 2. A few approaches for current element interconnection to make up pushpull output stages are proposed. At the same time the bipolar transistor “inherent” thermal feedback may be compensated in system level by applying the circuits. 3. An original circuit (patent SU 1748223) of current element that have stabile current transfer ratio was proposed. The circuit is equivalent to a bipolar transistor and features the linearity and stability of current transfer ratio despite the variation of technological process parameters. 4. Software TXYZ was modified to adopt it for the PC aided simulation of temperature distribution in IC chips. The application of software SURFER made possible the representation of the static temperature distribution in IC chips in the form of isotherms, three and two-dimensional fields. This allows PT layout optimization by taking into account the thermal aspects. 5. Three original PT structures are designed and fabricated by referring to the results of simulated temperature distribution in the layout. The temperature sensors included into the PT structure can sense up to 73 % of the maximum temperature in the structure in the worst case conditions of temperature gradient. 6. Resistor and transistor macro-models ant their parameter estimation techniques that make possible PSPICE simulation of dissipated power impact on component parameters are proposed. The macro-model application enables thermal processes including dynamic ones to be simulated in sophisticated electronic circuits. The thermal interaction between components is taken into account by using electrical equivalents of the thermal resistance and capacitance. The impact of dissipated power by components simulated by using conventional models is taken into account by using controlled current and voltage sources. The simulation results when proposed macro-models are used are in good agreement with measurements and in qualitative disagreement with the results when PSPICE “built-in” transistor models are used. This allows expensive experimental analysis of self-protected system to be replaced by simulation on a PC. 7. A system that ensures self-protection against PT local and IC chip overall thermal overloads is proposed (patent SU 1601742). PT local temperature estimation principle based on base-emitter voltage measurement enables to omit current stabilization in the emitter-sensor circuit and to eliminate the resistor from power emitter circuit. This makes possible the increase in repeatability of selfprotection switching ON corner in case of technological parameter variation. The system may be fabricated by using the simplest IC technology. 8. The compensation methods of bipolar transistor “inherent” positive thermal feedback may be analyzed by making the use of transistor and resistor macro-models proposed in chapter 3. Thus, experimental analysis requiring the formation of test chips may be replaced by simulation using PSPICE software. 9. An original PT structure (patent SU 1612874) was designed and fabricated using the simplest IC technology attempting to increase transistor

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resistance to secondary breakdown. The proposed PT makes possible to increase current distribution equality in its layout by about 2.5 times according to simulation results and to increase the current transfer ratio by about 30 % according to measurements comparing with the closest prototype proposed by F. Villa. These data indicate that the factors that cause secondary breakdown are reduced. The proposed method to increase the PT resistance to secondary breakdown as well as the PC aided analysis technique provide the means for the development of new resistant to secondary breakdown PT structures. 10. A PSPICE macro-model of a bipolar transistor and its parameter estimation technique that makes possible the avalanche phenomena caused processes to be taken into account was proposed. Good matching between experimental and simulation data demonstrates the validity of the macro-model. The experimental analysis of systems self-protected against voltage overloads that require test chip formation may be replaced by PC aided analysis applying the macro-model proposed. Simulation of avalanche phenomena caused processes in bipolar transistors may also be used in the design of many other types of circuits. 11. System self-protected against voltage overloads that features reference transistor operating point settled by making the use of the correlation between current transfer ratios of two transistors formed on the same chip was proposed (patent SU 1582264). According to the results based on PSPICE simulation making the use of the macro-model proposed in chapter 5, the improvement of protection switching ON voltage corner variation because of the technological parameter variation may be decreased from ± 42 % to ±7 % , and from ±1.4 % to ±0.2 % for current corner. The results are obtained comparing the proposed system with a prototype used in IC LM12. The proposed system may be integrated by making the use of the same technological processes as the IC the system is intended to be integrated into. 12. A few blocks for self-protected system implementation are proposed in the thesis. Current amplifier circuit (patent SU 1635248) makes the use of multichannel amplification approach to reach static current transfer ratio proportional to h21e4 . Current mirror circuit (patent SU 1656665) allows to increase the speed of p-n-p transistor based current mirror. Differential current amplifier (patent SU 1693715) features the combination of low input dynamic resistance, high rejection of common mode signal and low power supply voltage. The circuits proposed may be widely used in many other systems where low power supply voltage, high speed, and high current transfer ratio are required. 13. Current reference circuit for self-protected systems is proposed that lets to satisfy the requirements of stability and possibility to obtain well controllable current level and its temperature dependence on supply voltage. The circuit . µA / V and 0.9 µA / V output currents at the same provides a stabile and two: −17 time. The minimum supply voltage is 0.92 V . The possibility to obtain positive, negative or close to zero temperature coefficient of three output currents that are

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increasing, decreasing and stabile over supply voltage makes the circuit useful in wide variety of electronic systems. 14. Proposed voltage reference circuit makes possible to vary the output voltage and the temperature coefficient (including its sign) by varying the resistor ratio that is stabile in case of technological parameter variation. Along with the reference voltage, two reference currents that have opposite temperature coefficients ( 0.22 %/ oC and −0.65 %/ oC ) are formed. Double voltage stabilization makes possible as high as 0.01 % / V stability of output voltage. The data presented, as well as wide output voltage range ( 0 ÷ 6 V ) and the range of temperature coefficient changing (minimum ±0,34 %/ oC ) makes possible the application of the circuit in many other systems. 15. Macro-models that make possible dissipated power, thermal interaction between components and avalanche processes to be taken into account provides the means for increasing the application area of PSPICE software. Proposed methodologies of macro-model parameter estimation and application for the simulation of system self-protected against overloads along with the analysis methodology of temperature distribution in IC chips made possible to develop a few self-protected systems that are presented in the thesis. There are 9 patents, 3 articles presented in “Applied Ideas” section of Electronic Engineering journal and a certificate of some of the design approaches application in integrated circuits. The circuits are currently used by Lithuanian-USA joint venture Sharpe and Brown - Precizika. The results presented above make evident the scientific novelty, originality and practical importance of the thesis. LIST OF PUBLICATIOS 1. D. Zanevièius, A. Baðkis, V. Juodvalkis, J. Ðeduikis, V. Pileckienë, D. Baranauskas, P. Mickûnas and V. Gobis. Overview of Scientific-Technical Information on Research “Daina-SPI”. Vilnius, 1986. 207 p. (in Russian). 2. D. Baranauskas. Thermal Protection of Safe-operation Area of Bipolar Transistors. Proceedings of Conference: Modeling and Simulation in Microelectronics. Vilnius, 1987. P. 116-122. (in Russian). 3. D. Zanevièius, V. Juodvalkis, V. Pileckienë, J. Ðeduikis, D. Baranauskas, A. Laucius, A. Þalgiris, A. Baðkis, and V. Gobis. Overview of Scientific-Technical Information on Research “Daina-SPI”. Vilnius 1987. 129 p. (in Russian). 4. D. Baranauskas and V. Juodvalkis. USSR patent certificate of authorship SU 1541573. Circuit for Integrated Circuit Temperature Protection. 1989. (in Russian).

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5. D. Baranauskas, V. Juodvalkis and V. V. Ivanov. USSR patent certificate of authorship SU 1582264. Circuit for Transistor Over-voltage Protection. 1990. (in Russian). 6. D. Baranauskas and V. Juodvalkis. USSR patent certificate of authorship SU 1601742. Circuit for Temperature Protection. 1990. (in Russian). 7. D. Baranauskas and V. Juodvalkis. USSR patent certificate of authorship SU 1612874. Integrated Power Transistor. 1990. (in Russian). 8. A. Aulas, V. Juodvalkis, D. Baranauskas and J. Ðeduikis. Account on Research of “The Development and Fabrication of Power Transistors with Spread Emitter - Temperature Sensor and Polisilicon Equalizing Emitter Resistors” Vilnius 1990. 66 p. (in Russian). 9. D. Baranauskas, V. Juodvalkis, V. N. Ivanov and V. V. Ivanov. USSR patent certificate of authorship SU 1635248. Current Amplifier. 1990. (in Russian). 10. V. Juodvalkis, D. Baranauskas, J. Ðeduikis, A. Baðkis, and V. Gobis. Account on Research of “The Developing and Investigation of the Mathematical and Physical Simulation and Design of the Circuit and Layout Building Blocks of Analog, Analog-Digital and Power LSI ICs” Vilnius, 1991. P. 194. (in Russian). 11. D. Baranauskas, V. V. Ivanov , V. N. Ivanov and V. Juodvalkis. USSR patent certificate of authorship SU 1656665. Current Mirror. 1991. (in Russian). 12. D. Baranauskas, V. V. Ivanov, V. N. Ivanov and V. Juodvalkis. USSR patent certificate of authorship SU 1693715. Differential Amplifier. 1991. (in Russian). 13. V. Juodvalkis, D. Baranauskas, and J. Ðeduikis. USSR patent certificate of authorship SU 1698965. Square Pulses Formatter. 1991. (in Russian). 14. D. Baranauskas, V. Juodvalkis, V. N. Ivanov and V. V. Ivanov. USSR patent certificate of authorship SU 1748223. Integrated Power Transistor. 1992. (in Russian). 15. D. Baranauskas. Simple Economical Current Reference Circuit. Electronic Engineering. Vol. 65. N 804. December 1993. P. 32, 34. (in English). 16. D. Baranauskas. Battery Discharge Indicator. Electronic Engineering. Vol. 66. N 814. September 1994. P. 27. (in English). 17. D. Baranauskas. Voltage Reference for TC Compensation. Electronic Engineering. Vol. 66. N 815. November 1994. P. 58. (in English). 18. D. Baranauskas and A. Marcinkevièius. Bipolar Transistor Voltage Breakdown Simulation. Electronics and Electrical Engineering. Kaunas: Technologija, 1996. N 3(7). P. 60-64. (in English). 19. D. Baranauskas and A. Marcinkevièius. The Effect of Dissipated power in Electronic Components Evaluation in Simulation with PSPICE. Electronics and

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Electrical Engineering. Kaunas: Technologija, 1997, N 1 (10). P. 17–22. (in Lithuanian). 20. D. Baranauskas and A. Marcinkevièius. Positive Thermal Feedback in Bipolar Transistors. Proceedings of Elektronika’97 Conference. Kaunas: Technologija, 1997. P. 33–38. (in Lithuanian). REZIUMË Disertacijoje pateikiamos originalios savisaugës nuo srovës, átampos bei ðiluminiø perkrovø dvipoliø tranzistoriø sistemos, kuriø formavimui nereikia sudëtingø technologiniø procesø. Ðios sistemos sudaro galimybæ: padidinti esamø apsaugos nuo ðiluminiø ir átampos perkrovø sistemø ásijungimo tikslumà, sumaþinti galios nuostolius apsaugos nuo srovës perkrovø sistemose. Taip pat pateikiamos savisaugiø sistemø atraminës srovës ir átampos formuotuvø, srovës stiprintuvø ir veidrodþio schemos, kurios sudaro galimybæ praktiðkai realizuoti ðias sistemas. Pateikiama galios tranzistoriaus struktûra, kuri leidþia padidinti srovës pasiskirstymo tolygumà tranzistoriaus struktûroje ir taip padidinti atsparumà antriniam pramuðimui. Pasiûlyti PSPICE tranzistoriaus ir rezistoriaus makromodeliai leidþia ávertinti dël sklaidomosios galios pakilusios temperatûros gráþtamàjá poveiká elementø parametrams ir griûtinius procesus tranzistoriø bazëkolektorius sandûroje. Remiantis pasiûlytais makromodeliais gaunamas þymus modeliavimo tikslumo padidëjimas ir kokybiðkai geresni rezultatai lyginant su tuo atveju kai remiamasi vidiniais PSPICE modeliais. Pasiûlyti makromodeliai sudaro galimybæ modeliuoti savisaugiø sistemø funkcionavimà. Kai kurie disertacijoje pateikti rezultatai yra panaudoti integrinëse schemose.

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