Csa-q_bank-sohrt (1)

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COMPUTER SYSTEM ARCHITECTURE PART-A Questions UNIT – 1 1).What is a computer? 2).What are the basic units of Von Neumann computer 3).What are the limitations of computer. 4).Expand ENIAC 5).Define Multiprogramming? 6).Define Multiprocessing? 7)Define Time Sharing? 8).Give the name of the Von Neumann computer 9).Classify the digital computers based on its size. 10).What is a super computer 11).What are third generation computers? 12).What is meant by VLSI technology. 13).What are the main components of a uni processor. 14).What are the various generations of computers. 15).What are the Characteristics of Von Neumann computer 16).Define Parallel processing. 17) Define pipelining? 18).Mention some applications of parallel processing 19).What do you understand by ‘Multiplicity of functional units’? 20) In what way hardware and software are equivalent? Not equivalent 21) Distinguish between hardware and firmware. 22) Classify parallel computers. 23).What is an operation system 24).Define system throughput 25) Define ‘Stored program concept.’ 26)Write the features of first generation computers 27)Name the first successful commercial computer 28)Write the features of the second generation computers. 29)What is main frame computer. 30)What is Minicomputer 31)Define Microcomputer 32)What is personal computer 33)What is Workstation 34)List the steps involved in the instruction execution. 35) Write the features of the third generation computers. 36)Why does the computers adopt the binary number systems. 37).Explain the differences between CISC & RISC.

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UNIT II 38)what are the types of ALU? 39)What is the disadvantage of combinational ALU 40)Give any 2’ complement multiplier algorithm 41)What is spatial expansion in ALU 42)What is temporal expansion in ALU 43)When a ALU is said to be bit sliced 44)Give the advanced features of ALU 45)What is a co-processor 46)What is a co-processor trap 47)Define Micro operation? 48)What are the types of micro operations 49)Draw a logic circuit which performs both addition and subtraction. 50)Explain the 4-bit binary adder? 51)Explain the binary adder / sub tractor with a neat block diagram 52)Explain the binary incrementer with a neat block diagram 53) Design a 4-bit binary arithmetic circuit 54)With a neat block diagram fixed point ALU 55) Explain the Bit –sliced ALU with a neat block diagram. UNIT – III

56) what are the types of control organizations we have? 57)What are the differences between the hardwired control organization and micro programmed control organization 58) What is a control word 59)What is micro programmed control unit 60) What is a micro instruction 61)What is a micro program 62) What are the differences between the main memory and control memory 63)What is micro program sequencer 64)What is meant by mapping process 65) What are the differences between the horizontal micro programming and vertical micro programming 66) Give the micro instruction format 67) What is a hard wired logic. 68) What is micro programming 69)What are the advantages and disadvantages of the microprogramming. 70) What is a pipelined computer 71) List the various pipelined processors. 72)Classify the pipeline computers.

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74)Define efficiency of a linear pipeline? 75).Define reservation table of a pipeline processor. 76).Explain the need of an instruction buffer in a pipelined CPU. 77).Define arithmetic pipeline? Where it is used 78).What is vectorizer? 79).Write down the expression for speedup factor in a pipelined architecture. 80).Explain the delayed branch concept. 81).What do you mean by vector processing 82).Name two types of memory interleaving. 83).Identify the stages of Instruction pipeline. 84).Give the instruction format of Vector instruction 85) What is space time diagram . 86)What are the problems faced in instruction pipeline UNIT-IV 87) What is memory system? 88) Give classification of memory. 89) Define CPU Register, Main memory, Secondary memory, Cache. 90) Give the multilevel hierarchy of storage devices. 91) What is Read Access Time? 92) Define Random Access Memory. 93) What is Serial Access Memory. 94) What is Semi Random Access. 95) What is ROM, 96) What are PROMs? 97) What is destructive readout? 98) What do you mean by NDRO. 99) Define memory refreshing. 100) What is SRAM and DRAM? 101) What is volatile memory? 102) What is cycle time of memory? 103) Define data transfer rate or bandwidth. 104) What is MTBF? 105) Give the categories of semiconductor memories. 106) What is flash memory. 107) Mention the causes of long access a block of data in serial-access memory. 108) How will you calculate time Tb to access a block of data in serial-access memory? 109) What is multilevel memories? 110) What is split cache? 111) Give the basic structure of cache and what is its use? 112) What is cache data memory?

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113) Mention two system organization for caches. 114) What is associate memory. 115) Define seek time and latency time. 116) Mention two kinds of address locality to achieve their goal. 117) What is the use of magnetic tape memories in today’s usage. 117) What is DVD? 119) Define magneto optical disk. UNIT V 120) define intra segment and inter segment communication. 121)Mention the group of lines in the system bus. 122)What is bus master and slave master 123)What is the use of IO controller. 124) Differentiate synchronous and asynchronous communication 125) What is strobe signal 126)What is bus arbitration 127)Mention the types of bus arbitration 128)What is IO control method 129)What is DMA PART-B Unit-I 1.With a neat block explain the Basic computer organization 2.With a neat block diagram explain the Von-Neuman architecture 3.Explain the different addressing modes with examples. 4.Write a note on performance issues 4.What are the different instruction formats. Explain the different instruction types. 5. Write a note on Stacks and Queues. 6. A two word instruction is stored in memory at an address specified by the symbol W. The address field of instruction is ( stored at W+1) is designated by the symbol Y. The operand used during the execution of instruction is stored at an address symbolized by Z. An index register contains the value X. State how Z can be calculated from other addresses if the addressing mode is i)direct ii)indirect iii)relative iv)indexed 7. Explain the following addressing modes with example and also give their application. i)auto increment addressing. ii)based addressing. iii)based indexed with displacement addressing

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8. A memory unit with a capacity of 65,536 words of 25 bits each. It is used in conjunction with a general-purpose computer. The instruction code is divided into four parts an indirect mode bit, opcode, two bits that specify a processor register and an address part. what is the maximum number of operations that can be in the computer if the instruction is stored in one memory word. Draw the instruction word format indicating the number of bits and the function of each part. How many processor registers are there in the computer and how many bits in each. (d) How many bits are there in MBR,MAR and PC. 9.What value remains on the stack after the following sequence of instructions. PUSH#4 PUSH#7 PUSH#8 ADD PUSH#10 SUB MUL Unit-II 10.Give the hardware representation for Booth’s Multiplication method and Explain the Booth’s Multiplication algorithm . Trace the algorithm for multiplication of two fixed point binary numbers –5 x –4. 11.Give block diagram for performing fixed point addition/subtraction. Explain the fixed point addition/subtraction algorithm. 12.Explain with a neat block diagram the Multiplier pipeline unit 13. Explain the Booths Multiplication algorithm with an example. 14. Write short notes on the following. a)Bit sliced ALU b) Non restoring Division. 15.Explain the Restoring method of division with example 16.Write a note on Fast multipliers. 17. Explain with a neat block diagram the array multiplier 18. Explain floating point Addition/ Subtractions algorithm. 19.Explaint the floating point multiplication algorithm 20.Explaint the floating point division. 21.Write a note on a) array multipliers b) CSA multipliers. Unit-III 22.Describe the hardwired control organization in detail

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23. Describe the micro programmed control unit organization in detail. 24. The control memory has 4096 words of 24 bits each. a) How many bits are there in the CAR. b)How many bits are there in each of the 4 inputs 25. Identify the hazards found in the following instruction sequence ADD R1,R2,R3 (R1 -> destination register ) MUL R1,R6,R7 (R1 -> destination register ) DIV R4,R5,R1 (R4 -> destination register ) SUB R5,R7,R8 (R5 -> destination register ) BEQ R4, 1000 26. Explain in detail the various pipeline hazards 27. What is pipelining? Explain with a space time diagram. Derive the pipeline performance equation. 28.Explain with a neat block diagram the Superscalar processor. 29. Explain the concept of pipelining with a neat characteristic diagram and derive the expression for speedup. 30.Design a pipeline configuration for the following arithmetic expression. Ai * Bi + Ci 31) Explain in detail the various pipeline hazards 32) What are multiple issue processors. Explain in detail about Superscalar processors. Unit-IV 31. 33. How the cache blocks are mapped to main memory module using a) Direct mapping method b) Associative mapping method c)Set Associative method. 34.Explain how a virtual address is converted to a physical address with an example. 35.Explain the different mapping methods used in cache memory. 36.Explain how virtual address is converted to physical address with an example. 37. Write short note on various secondary storage devices. 38) Give the basic representation of DRAM cell. Explain the organization of DRAM memory. 39.Explain the memory hierarchical structure. 40.Wriet a note on Semiconductor memories. 41. Explain the basic representation of Static RAM cell. Explain the organization of SRAM memory. 42. A digital computer has a memory capacity of 64kx16 and a cache memory of 1k words. The cache uses a direct mapping with a block size of 4 words a. How many bits are there in the tag , index, block and word fields of the address formats.

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b. How many bits are there in each word of the cache , how they are divided in to function ? Include a valid bit. c. How many blocks can the cache can accommodate.

Unit-V 43. Explain the different data transfer techniques. 44. What is IO interface? Why do you need an IO interface. Explain it with a neat block diagram 45. Write short notes on the following a) Programmed IO b) Daisy chain priority interrupt 46. Explain the data transfer method using DMA 47. It is necessary to transfer 256 words from magnetic disk to a memory section starting from address 1230. The transfer is by means of DMA. a. Give the initial value that the CPU must transfer to the DMA. b. Give the step by step procedure for actions taken during the input of the first two words. 48.Explain the organization of the SCSI bus 49.Write a note on PCI bus 50. Write a note on Secondary storage devices.