Cs 345 Project 5 - Virtual Memory

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Virtual Memory CS 345 - Project Five

Purpose Memory management involves a complex interrelationship between computer hardware and operating system software. In a virtual memory system, memory references within a task are logical addresses that are dynamically translated into physical addresses during run time. As such, a task may move in and out of main memory and occupy different regions of physical main memory at different times during the course of its execution. In addition, a task may be broken into a number of pieces (pages) that may or may not be contiguous in main memory (frames). Thus, not all pages of a task have to be physically present nor contiguous in main memory during execution. This is the basis for virtual memory. Project 5 is designed to help the student understand:      

the concepts of swap space, main memory, and virtual memory. the details of page faulting and a page replacement algorithms. what memory access, hit, and fault counts are and how to track them. how to implement virtual address translation with a two-level page table. the additional overhead of a virtual memory system. how virtual memory functions are divided between operating system software and the hardware memory management unit (MMU).

LC-3 Processor The LC-3 (Little Computer 3) is an ISA definition for a 16-bit computer. Its architecture includes physical memory mapped I/O via a keyboard and display; TRAPs to the operating system for handling service calls; conditional branches on N, Z, and P condition codes; a subroutine call/return mechanism; a minimal set of operation instructions (ADD, AND, and NOT); and various addressing modes for loads and stores (direct, indirect, Base+offset, PC-relative, and an immediate mode for loading effective addresses). Programs written in LC-3 assembler execute out of a 65536 word memory space. All references to memory, from loading instructions to loading and storing register values, pass through the getMemAdr() function. The hardware/software function of Project 5 is to translate virtual addresses to physical addresses in a restricted memory space. The following is the default, pass-through, MMU code for all memory references by the LC3 simulator. unsigned short int *getMemAdr(int va, int rwFlg) { unsigned short int pa; // turn off virtual addressing for system RAM if (va < 0x3000) return &memory[va]; // translate virtual address to a physical address pa = va; // return physical pointer to accessed memory location return &memory[pa]; } // end getMemAdr

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Project Requirements The following are important guidelines for programming the Virtual Memory assignment: 1) Main Memory: The maximum physical memory size of the LC-3 is 65536 words (216+1 = 128K bytes). For this assignment, you will need to allow the user to specify the physical size of main memory, ranging from 194 to 1024 frames (24.25K to 128K bytes). A page/frame size is equal to 26 words (128 bytes). 2) Virtual Memory: The full 16-bit virtual address space needs to resolve to the physical address space of the LC-3 using a two-level page table implementation (see Stallings, Chapter 8.1). Up to 32 tasks may simultaneously access LC-3 physical memory via their task Root Page Table pointer. All MMU data including frame allocation tables, Root Page Tables, and User Page Tables are to be stored in LC-3 memory. Use the advanced clock algorithm for page replacement (Stallings pp. 368-373).

3) Swap Space: Each page in swap space is 26 words (128 bytes). We will simulate 4096 pages (212  27 = 219 = 524,288 bytes) of swap space. Since virtual addresses in the LC-3 simulator are 16 bits long, each task could address up to 64K words of its own memory, regardless of the physical size of memory. Frames unloaded from physical memory must be stored in one of the 4096 pages of swap space. For Project 5, this swap space is a random-accessed memory array used to simulate a hard disk. The unit of access to swap space is one page. 4) Page Replacement: Once all of the available physical frames in main memory have been acquired, replace older frames with newly referenced pages according to the simple clock algorithm. Pinned frames are never replaced. Dirty frames are written back to swap space before being allocated to BYU, CS 345

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another task. The root page table (RPT) for each task is always implicitly pinned in memory. Additionally, a user page table (UPT) page is pinned in memory while it contains any valid page table entries (indexes to pages in physical memory). 5) A page table entry (RPTE and UPTE) is four bytes. Please format them as follows: o o o o o o o

Frame valid (1 bit): one if referenced frame is in main memory; zero otherwise. Dirty (1 bit): one if referenced frame has been altered; zero otherwise. Reference (1 bit): one if frame has been referenced; zero otherwise. Pinned (1 bit): one if frame is pinned in memory; zero otherwise. Frame number (10 bits): If referenced page is in memory, this value specifies which frame it occupies. (1024 frames  64 words = 210  26 = 216 bytes = 65536 words.) Swap valid (1 bit): one if referenced page has been allocated in swap space; zero otherwise. Swap page number (12 bits). This specifies where referenced page is stored in swap space. When you load a page into memory, you should include this value in your frame table summary. (4096 pages  128 bytes = 212  27 = 219 bytes = 524,288 bytes.) F D R P -

-

f

f

frame # (0-1023) f f f f f f f

f S -

-

page # (0-4095) - p p p p p p p p p p p p

6) Your MMU should be able to support up to 32 tasks, each with its own virtual address space. (Note: this may be limited by the size of the virtual swap space.) The root page tables are static and pinned. The associated user page tables and frames are allocated from the available physical memory. The user should be able to view the contents of any page in swap space or main memory. The user should also be able to see a summary of the contents of all physical frames in memory. 7) Computing Performance Statistics: Because of the virtual address translation mechanisms, each memory request actually requires a minimum of three memory accesses: one to the RPT, one to the UPT, and one to the actual page. If any page is not in memory, a page fault occurs (miss). Hit and fault counts should be updated for each LC-3 instruction. The fault rate is the fraction of memory accesses that result in a fault, ie. Fault rate = memPageFaults / (memPageFaults + memHits). The sum of the hits (memHits ranges from 1-3) and the faults (memPageFaults ranges from 0-2) should always equal the number of memory accesses (memAccess) for each instruction. 8) User Interface: You are free to create your own CLI commands to display running results of your memory management unit (MMU). Most of the following functionality is provided, but you are still required to verify their validity. o o o o

A way for viewing pages in swap space. A way for viewing frames in main memory, both physically and virtually. A way for displaying performance statistics (requests, hits, misses). A way to display a RPT, UPT, and frame contents as they pertain to the virtual/physical organization of main memory.

Implementation Strategy 1. Read and comprehend Stallings Chapter 8, especially Sections 1 and 2. BYU, CS 345

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2. Comprehend these lab specs. Discuss questions with classmates, the TA’s and/or the professor. Make sure you understand what the requirements are! It's a tragedy to code for 20 hours and then realize you're doing everything wrong. 3. Validate that the demo LC-3 simulator works for a single task with pass-through addressing (virtual equals physical) by executing the commands “crawler” and “memtest”. 4. Design your MMU. Break the problem down into manageable parts. (See step 7 below.) 5. Create structures for PTEs, frame allocation, and Swap Page allocation. Decide how you want to extract the values for the various fields in PTEs and VM addresses. 6. Either use the paging routines provided or code your own function to handle the swap space. 7. Incrementally add support for the actual translation of virtual addresses to physical addresses with page fault detection as follows: 1. Implement page fault frame replacement using available memory frames only. This should allow you to execute a test program in a full address space. 2. Implement clock page replacement algorithm to unload data frames to swap pages and reload with a new frame or an existing frame from swap space. This should allow you to execute all the test programs in a 32k word address space (20k of paging frames). 3. Implement clock page replacement of User Page Tables when there are no physical data frame references in the UPT. This will be necessary when running in a small physical space (1k words) with multiple tasks. 8. Use the vma function to access a single virtual memory location and then display any non-zero RPT and UPT entries. Implement various levels of debug trace to watch what is going on in your MMU. You may use the provided display functions where feasible. 9. Successful completion of this project requires exactness. Although there are many ways to implement frame management, there is little (if any) room for error!

Implementation 1. Do the following:  Verify a clean compilation of your LC-3 virtual memory simulator. Validate that “crawler” and “memtest” programs execute properly.  Modify the getMemAdr() function (OS345mmu.c) to handle virtual memory addressing.  Implement a simple clock page replacement algorithm with a reference bit to unload LRU frames.  Use the provided 0.5MB page swap table routine to simulate paged disk storage (4096 pages) or implement your own routine.  Modify your im command to do the following: 1. Adjust the upper physical memory limit of the LC-3 memory. 2. Initialize (clear) LC-3 memory (which initializes all RPT and UPT entries). 3. Clear the hit/miss counts. 4. Recovery all physical frames and swap pages.  Use the following CLI commands to verify and validate your virtual memory system. (Most of these routines are provided, but may require some adaptation to your system.) o dfm <#> Display LC3 memory frame <#> o dft Display frame allocation table o dm <sa>,<ea> Display physical LC3 memory from <sa> to <ea> o dp <#> Display page <#> in swap space o dv <sa>,<ea> Display virtual LC3 memory <sa> to <ea> o im <ea> Init LC3/Set upper LC3 memory limit o rpt <#> Display task <#> root page table o upt

<#> Display task

user page table <#> BYU, CS 345 Project Five – Virtual Memory Page 4/7

o o

vma vms

Access
and display RPTE’s and UPTE’s Display LC3 statistics

2. Demonstrate that LC-3 tasks run correctly. Be able to dynamically change LC-3 memory size (im command) and chart resulting changes in page hits/faults as shown below. Memory accesses, hits and faults are defined as follows: Hit (memHits) = access to task RPT, UPT, or data frame. (Exclude accesses below 0x3000.) Fault (memPageFaults) = access to a task page that is undefined or not currently in a memory frame. Memory access (memAccess) = sum of memory hits (memHits) and memory faults (memPageFaults).

Task

Accesses

320 Frames Hits

Faults

Accesses

16 Frames Hits

Faults

Crawler Memtest

Grading and Pass-off Your Virtual Memory assignment is to be demonstrated in person to a TA. The assignment is worth 20 points, which will be awarded as follows:     

8 pts – Successfully execute crawler and memtest in 20k words (x3000 – x7FFF, 320 frames). 6 pts – Successfully execute crawler and memtest in 1k words (x3000 – x33FF, 16 frames). 2 pts – Successfully execute 5 or more LC-3 tasks simultaneously in 16 frames of LC-3 memory. 2 pts – Correctly use the dirty bit to write only altered or new memory frames to swap space. 2 pts – Chart the resulting memory access, hit, and fault statistics after executing crawler (and then memtest) in 320 and 16 frames.

In addition to the normal 20 points, the following bonus/penalties apply:      

+2 points bonus for early pass-off (at least one day before due date.) +2 points bonus for adding a per/task frame/swap page recovery mechanism of a terminated task. +1 point bonus for implementing the advanced clock algorithm (Stallings, pp. 372-373). +1 point bonus for implementing an additional replacement policy and chart the results. +2 points bonus for joining the 2-frame club. (Successfully execute 5 or more LC-3 tasks simultaneously in 2 frames of LC-3 memory. Chart the memory accesses, hits, and faults.) –2 points penalty for each school day late.

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Sample Output CS345 W2005.1 - Project #5 0>>im Setting upper memory limit to 0x8000 Physical Address Space = 320 frames (20.0kb) 2>>help p5 Project 5: dfm, dft, dm, dp, dv, im, rpt, run, upt, vma, vms 5>>crawler Load "crawler.hex" Memory loaded... pc=0x3000 Crawler R1.1 Process 1: Move #1 to xE29E Process 1: Move #2 to x6B3F … Process 1: Move #99 to x932E Process 1: Move #100 to xDA8F Process #1 Halted at 0x937e rpt 1 x0000-x07ff (x2400) = 0000 0000 ---x0800-x0fff (x2402) = 0000 0000 ---x1000-x17ff (x2404) = 0000 0000 ---x1800-x1fff (x2406) = 0000 0000 ---x2000-x27ff (x2408) = 0000 0000 ---x2800-x2fff (x240a) = 0000 0000 ---x3000-x37ff (x240c) = 0000 8006 ---- Frame=0 Page=6 x3800-x3fff (x240e) = 0000 0000 ---x4000-x47ff (x2410) = f101 0000 PDR- Frame=257 x4800-x4fff (x2412) = f0ed 0000 PDR- Frame=237 x5000-x57ff (x2414) = d0e6 0000 PD-- Frame=230 x5800-x5fff (x2416) = b0f8 8020 P-R- Frame=248 Page=32 x6000-x67ff (x2418) = d15a 0000 PD-- Frame=346 x6800-x6fff (x241a) = 9135 8035 P--- Frame=309 Page=53 x7000-x77ff (x241c) = 0000 8043 ---- Frame=0 Page=67 x7800-x7fff (x241e) = d1ab 0000 PD-- Frame=427 x8000-x87ff (x2420) = d0f4 0000 PD-- Frame=244 x8800-x8fff (x2422) = f123 0000 PDR- Frame=291 x9000-x97ff (x2424) = f128 0000 PDR- Frame=296 x9800-x9fff (x2426) = 0000 804a ---- Frame=0 Page=74 xa000-xa7ff (x2428) = 915e 8059 P--- Frame=350 Page=89 xa800-xafff (x242a) = d194 0000 PD-- Frame=404 xb000-xb7ff (x242c) = d17e 0000 PD-- Frame=382 xb800-xbfff (x242e) = f1c4 0000 PDR- Frame=452 xc000-xc7ff (x2430) = f0d7 0000 PDR- Frame=215 xc800-xcfff (x2432) = d0dd 0000 PD-- Frame=221 xd000-xd7ff (x2434) = d14e 0000 PD-- Frame=334 xd800-xdfff (x2436) = f132 0000 PDR- Frame=306 xe000-xe7ff (x2438) = d0c9 0000 PD-- Frame=201 xe800-xefff (x243a) = f161 0000 PDR- Frame=353 xf000-xf7ff (x243c) = 0000 0000 ---xf800-xffff (x243e) = f0c7 0000 PDR- Frame=199 22738>>upt 0x4000 x4000-x403f (x4040) = 0000 0000 ---x4040-x407f (x4042) = 0000 0000 ---x4080-x40bf (x4044) = 0000 0000 ---x40c0-x40ff (x4046) = 0000 0000 ---x4100-x413f (x4048) = 0000 0000 ---x4140-x417f (x404a) = 0000 0000 ---x4180-x41bf (x404c) = e1e3 0000 FDR- Frame=483 x41c0-x41ff (x404e) = e1a0 0000 FDR- Frame=416 x4200-x423f (x4050) = e1a1 0000 FDR- Frame=417 x4240-x427f (x4052) = e1a2 0000 FDR- Frame=418 x4280-x42bf (x4054) = e138 0000 FDR- Frame=312 x42c0-x42ff (x4056) = e139 0000 FDR- Frame=313 x4300-x433f (x4058) = c13a 0000 FD-- Frame=314

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x4340-x437f (x405a) = c13b 0000 x4380-x43bf (x405c) = c13c 0000 x43c0-x43ff (x405e) = c13d 0000 x4400-x443f (x4060) = 0000 0000 x4440-x447f (x4062) = 0000 0000 x4480-x44bf (x4064) = 0000 0000 x44c0-x44ff (x4066) = 0000 0000 x4500-x453f (x4068) = 0000 0000 x4540-x457f (x406a) = 0000 0000 x4580-x45bf (x406c) = c102 0000 x45c0-x45ff (x406e) = c103 0000 x4600-x463f (x4070) = c104 0000 x4640-x467f (x4072) = c105 0000 x4680-x46bf (x4074) = c106 0000 x46c0-x46ff (x4076) = c107 0000 x4700-x473f (x4078) = e142 0000 x4740-x477f (x407a) = e10d 0000 x4780-x47bf (x407c) = e1fb 0000 x47c0-x47ff (x407e) = e1fc 0000 22740>>dp 5 Page 5 0x0000: 0000 0000 0000 0000 0000 0x0008: 0000 f025 f025 f025 f025 0x0010: f025 f025 f025 f025 f025 0x0018: f025 f025 f025 f025 f025 0x0020: f025 f025 f025 f025 f025 0x0028: f025 f025 f025 f025 f025 0x0030: f025 f025 f025 f025 f025 0x0038: f025 f025 f025 f025 f025 22742>>vms Memory accesses = 1067934 hits = 1067449 faults = 485 rate = 0.045415% Swapped Pages = 165 (20 kb) 22744>>

FD-FD-FD-------------------FD-FD-FD-FD-FD-FD-FDRFDRFDRFDR-

Frame=315 Frame=316 Frame=317

0000 f025 f025 f025 f025 f025 f025 f025

0000 f025 f025 f025 f025 f025 f025 f025

Frame=258 Frame=259 Frame=260 Frame=261 Frame=262 Frame=263 Frame=322 Frame=269 Frame=507 Frame=508 0000 f025 f025 f025 f025 f025 f025 f025

LC-3 Memory Layout Address x0000 x0400 x0800 x0C00 x1000 x1400 x1800 x1C00 x2000 x2400 x2800 x2C00 x3000 x3400 x3800 x3C00 x4000

Frame 0

128 144 160 176 192

P x x x x x x x x x x

Allocated TRAP/interrupt vectors

Frame Bit Table (210 frames - 24 bits = 26 = 64 words) 32 RPT’s (25  26 = 211 words) (32 processes)

User Program Space

224 256

… xF800

BYU, CS 345

991

Stack Memory Mapped I/O

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