A D Converters 1

A-D CONVERTERS 1

WHAT IS IT FOR? ► It

accepts analog i/p and produces o/p binary word(d1d2… dn) of functional value D. ► D=d12-1 + d22-2 + … +dn2-n ► d1=MSB 2

, dn =LSB

CONVERSION PRINCIPLES ► Direct

type ADCs compares a given analog signal with internally generated equivalent signal.

3

► Integrating

type ADCs perform conversion in indirect manner by first changing the analog i/p signal to a linear function of time or freq and then to digital code.

BROAD CLASSIFICATION OF ADCs(based on conversion technique) ► DIRECT

ADC

TYPE

► Flash(comparator) ► Counter

(ramp)

type ► Tracking (servo) type ► Successive approximation type 4

 INTEGRATING TYPE ► Charge

balancing ► Dual slope

THE PARALLEL COMPARATOR(FLASH) A/D CONVERTER ► ►

►

► ► ►

5

Simplest,fastest and most expensive. It compares the analog i/p voltage with each node voltage. Conversion takes place simultaneously rather than sequentially. Typical conversion time is 100 ns or less. No of comparators required are 2n – 1. Conversion time is limited by speed of comparators.

Voltage input

6

Logic output Y

Va >Vd

X=1

+

Va
X=0

-

Va =Vd

Previous value

Input voltage

x7

x6

x5

x4

x3

x2

x1

x0

y2

y1

Y0

0-VR/8

0

0

0

0

0

0

0

1

0

0

0

VR/8-VR/4

0

0

0

0

0

0

1

1

0

0

1

VR/4-3VR/8

0

0

0

0

0

1

1

1

0

1

0

3VR/8-VR/2

0

0

0

0

1

1

1

1

0

1

1

VR/2-5VR/8

0

0

0

1

1

1

1

1

1

0

0

5VR/8-6VR/8

0

0

1

1

1

1

1

1

1

0

1

6VR/8-7VR/8

0

1

1

1

1

1

1

1

1

1

0

7VR/8-VR

1

1

1

1

1

1

1

1

1

1

1

COUNTER (RAMP) TYPE COMPARATOR ► ►

►

7

Low speed Conversion time may be as long as (2n -1) clock periods depending upon magnitude of i/p voltage. Counter freq must be low enough to give sufficient time for DAC to settle and for comparator to respond.

SERVO TRACKING A/D CONVERTER ► It

is an improved version of ADC. ► It is simple. ► The time needed to stabilize is more as new conversion is directly prop to the rate of change of analog signal.

8

SUCCESSIVE APPROXIMATION COUNTER ►

►

►

9

Completes n-bit conversion in just n clock periods. It uses SAR to find req value of each bit by trial & error. This ckt is more versatile and superior to all ckts discussed.

start

EOC

Va

+ -

SAR d1 d2

CLK

d8 d1MSB d2

d8

DAC

Functional block diagram of the successive approximation ADC

DUAL SLOPE(DUAL RAMP) ADC ►

► ►

10

It provides excellent noise reduction due the integrator. Conversion time is longer.(2n-T) These are suitable for accurate measurements of slow varying signals(thermo couples,weighing scales,digital panel meters & multimeters).

POINTS TO REMEMBER ► ADCs

are either direct type or indirect type. ► Most direct type ADCs require DAC. ► Flash converter is fastest but uses max hardware. ► Counting type ADC has low speed but simple. ► Tracking ADC is simple but gives error when analog signal varies rapidly. ► Successive approximation ADCs are most versatile.Most monolithic ADCs are of this type. ► Dual slope converters are suitable for precise measurement of slowly varying 11

DAC/ADC SPECIFICATIONS ► RESOLUTION ► LINEARITY ► ACCURACY ► MONOTONOCITY ► SETTLING ► STABILITY

12

TIME

DAC/ADC SPECIFICATIONS ► RESOLUTION:

of a converter is the smallest change in voltage which may be produced at the o/p (or i/p) of the converter. ► Resolution of DAC =[VFS/(2n-1)] =1 LSB ► Resolution

of ADC (for M volts i/p range) is [M/(2n -1)].

13

DAC/ADC SPECIFICATIONS ► LINEARITY:

it’s a measure of accuracy and tells us how close the converter o/p is to it’s ideal transfer characteristics. ► Linearity error is usually expressed as a fraction of LSB increment or percentage of full-scale voltage. ► A good converter exhibits an error of less than +(1/2)LSB or –(1/2)LSB. 14

DAC/ADC SPECIFICATIONS ► ACCURACY:

absolute accuracy is the max deviation b/w actual converter o/p and ideal converter o/p. ► RELATIVE ACCURACY is the max deviation after gain and offset errors have been removed.

15

DAC/ADC SPECIFICATIONS ► MONOTONOCITY

: a monotonic DAC is one whose analog o/p increases for an increase in digital i/p. ► If a DAC has to be monotonic,error should be less than + or -0.5 LSB.

16

DAC/ADC SPECIFICATIONS ► SETTLING

TIME : represents the time taken for o/p to settle within specified band +or -0.5 LSB. ► It depends on switching time of logic circuitary. ► Settling time ranges from 100ns to 10 micro secs depending on wordlength and type of ckt used. 17

DAC/ADC SPECIFICATIONS ► STABILITY

: performance of converter changes with temp,age and power supply variations. ► so all relevant parameters as offset,linearity and monotonocity must be specified over the full temp and power supply ranges.

18

start

EOC

Va

+ -

SAR d1 d2

CLK

d8 d1MSB d2

d8

DAC

Functional block diagram of the successive approximation ADC

19

20

Number of clock cycles required Input change Tracking devices faster

21

Successive approximation device faster Number of increments