3 Phase High Pf Ac Dc Converter
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Three-phase high power factor AC/DC converter B.-R. Lin and T.-Y. Yang Abstract: A unidirectional three-phase AC/DC converter is proposed to obtain almost unity power factor, draw sinusoidal line currents and keep the DC-bus voltage constant. Two active switches and two power diodes are used in each converter leg to generate a three-level PWM waveform on the AC terminal voltages. The proposed converter has simpler circuit configuration compared with the conventional three-level PWM converters. The classical proportional-integral voltage controller and the hysteresis current controller are adopted in the control scheme to achieve DC-bus voltage regulation and line-current command tracking. A neutral-point voltage compensator is used to balance the neutral-point voltage due to load change. The validity and effectiveness of the proposed control algorithm is verified through simulations and experimental results.
1
Introduction
Diode or phase-controlled rectifiers are widely utilised in the front-end converter for the uncontrollable or controllable DC-bus voltage in industrial and commercial applications. However, low power factor and nonsinusoidal line currents are drawn from the AC source owing to a large electrolytic capacitor used on the DC link. Power pollutants such as reactive power and current harmonics result in line-voltage distortion, heating of the transformer core and electrical machines, and increased losses in the transmission and distribution line. To meet the relevant standards in Europe and America, several current wave-shaping solutions [1–4] have been proposed to achieve power factor correction and current-harmonic reduction. In [1] conventional singlephase rectifiers with one, two or four switches were used to achieve power factor correction based on two-level (unipolar or bipolar) pulse-width modulation (PWM). In [2] the single-phase voltage-doubler boost rectifiers with one, two, three or four switches were used to achieve power factor correction and DC-bus voltage regulation. The DCbus voltage is twice the peak mains voltage. Switched mode rectifiers with three or four rectifier legs can achieve high power factor and low current harmonics in the three-phase three-wire or four-wire systems. Six or eight power switches are used in the three-leg or four-leg converter of [5–9] to generate bipolar PWM waveforms on the AC terminal. If the bidirectional power flow is not necessary in the application system, switched-mode rectifiers are not a good choice for the large number of power switches. Multilevel rectifiers and inverters have been proposed [10–15] for highpower and medium-voltage applications because they provide advantages such as the low voltage rating of power semiconductors and low voltage harmonics. However, the r IEE, 2005 IEE Proceedings online no. 20045201 doi:10.1049/ip-epa:20045201 Paper first received 28th October 2004 and in final revised form 15th January 2005. Originally published online: 8th April 2005 The authors are with the Power Electronics Research Laboratory, Department of Electrical Engineering, National Yunlin University of Science and Technology, Touliu City, Yunlin 640, Taiwan, ROC IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
disadvantages of the multilevel rectifiers are the large number of power semiconductors in the circuit, a complex control scheme and the neutral-point voltage balance problem. In industrial applications with a unidirectional power flow, conventional multilevel converters are too expensive and complicated to implement. A three-phase three-level AC/DC converter with fewer power switches is presented to achieve almost unity power factor, to regulate the DC-link voltage and to achieve fast dynamic response. Six active switches are required in the proposed converter. Compared with conventional neutralpoint diode-clamped or capacitor-clamped converters the proposed converter has fewer power switches and a simple control scheme. Two control loops are used in the proposed control algorithm: a proportional-integral voltage controller in the outer control loop to maintain the DC-link voltage constant, and an hysteresis-based current controller in the inner control loop to track line-current commands. A voltage compensator is adopted to balance the neutral-point voltage. Three voltage levels are generated on the AC terminal to neutral-point voltages. The effectiveness and validity of the proposed control strategy are verified through computer simulation and experimental results. 2
2.1
System configuration and operation principle
System configuration
Conventional three-level AC/DC converters are based on neutral-point clamped, flying capacitor and series connections of H-bridge topologies. A three-level neutral-point diode-clamped converter needs four active switches and two clamping diodes in each converter leg to achieve power factor correction. A three-level converter with flying capacitor topology needs four active switches and one flying capacitor to draw a sinusoidal line current from the utility system. Figure 1a shows the proposed single-phase unidirectional power flow rectifier to draw a sinusoidal line current with almost unity power factor and maintain the DC-bus voltage constant. There are a boost inductor L, two power diodes Da1 and Da2, two DC-bus capacitors C1 and C2, and two active switches Sa1 and Sa2 in the proposed converter. The voltage stress of switch Sa2 and diode Da2 is equal to half the DC-bus voltage, and the voltage stress of 485
vdc
L, r a
C1 Sa 2 o
Sa1
vsa
i2
Da1
p
isa
i1
Da 2
L, r load
isa
io vC 1
isa
a
C1
vsa
o
vC 2
i2
C2 i3
io vC 1
load
i1
Da 2
vdc vsa > 0
p
vC 2 C2
n
a
n a
Da 2 vdc Da1
vsb
Db 2
L, r
L, r isc
Sb 2
Sb1 Db1
p
io
i2
isa
io vC 1 a
C1 Sa 2 o
vsa
i2
vC 2
vC 2
C2 Dc 2
i3
C2
n
c
n b
Sc 2
Sc1 Dc1
vdc b
Fig. 1
vsa < 0
Proposed unidirectional AC/DC converter
isa
C1
a
C1 Sa1
486
o i2 C2
vC 2
n c vdc vsa < 0
isa
p io vC 1
L, r a
C1
isa o
vsa
i2 vC 2
Da1
C2 i3
n
d
Principle of operation
There are two independent active switches in the proposed converter leg. Unipolar PWM voltage waveforms can be generated on the AC terminal to neutral-point voltages. Before analysis of the proposed converter the following assumptions are made: the power switches are ideal; the supply voltage is constant during one switching period; Sxy ¼ 1 (or 0) if active switch Sxy is turned on (or off), x ¼ aBc, y ¼ 1B2; and the capacitor voltages on the DC side are equal (vC1 ¼ vC2 ¼ vdc/2). In each converter leg there are four operation states shown in Fig. 2 to generate three different voltage levels. Figure 2a gives the equivalent circuit of the first operating state. In this state, positive line current flows through the body diode of active switch Sa1 and diode Da2 to charge capacitor C1. The AC-side voltage vao equals vdc/2. The line current isa is linearly decreasing in this state because the boost inductor voltage is negative
io v
vsa
switch Sa1 and diode Da1 is equal to the DC-bus voltage. No clamping capacitor or diode is needed in the proposed single-phase converter. A unipolar PWM voltage waveform is generated on the voltage vao. Figure 1b shows the system configuration of the proposed three-phase three-level AC/ DC converter. It consists of three converter legs, three boost inductors on the AC side and two capacitors in series on the DC side. Two power switches and two fast recovery diodes are used in each leg. The main functions of the proposed three-phase converter are current harmonic elimination, neutral-point voltage balance, unity power factor and DClink voltage regulation. Two control loops in the system achieve DC-link voltage regulation and line-current tracking. The hysteresis comparators in the inner control loop track the line-current commands. The proportional-integral controller in the outer control loop maintains the DC-link voltage constant.
p
isa
L, r
a Single-phase circuit configuration b Three-phase circuit configuration
2.2
p
L, r
vC 1 C1 o
b
isb
vsc
i1
isa
load
Sa 2
Sa1
vsa > 0
load
isa
iso
vdc
a
load
L, r
load
vsa
Fig. 2 Operating states of proposed single-phase AC/DC converter a State 1 b State 2 c State 3 d State 4
(vL ¼ vsavdc/2o0). Figure 2b gives the equivalent circuit of second operating state. The line current flows through the body diode of active switch Sa1 and active switch Sa2. The AC-side voltage vao equals 0. The boost inductor voltage equals vsa. The line current isa is linearly increasing if the mains voltage vsa is positive. Figure 2c shows the equivalent third operating state. The negative line current flows through switch Sa1 and the body diode of switch Sa2 to obtain AC-side voltage vao ¼ 0. The line current is linearly IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
decreasing because vL ¼ vso0. The equivalent circuit of the fourth operating state is given in Fig. 2d. The line current flows through capacitor C2 and Da1 to generate AC terminal voltage vao ¼ vC2. The negative line current will charge capacitor C2. The boost inductor voltage equals vsa+vC240 such that the line current is linearly increasing. In state 4 only one diode Da1 is conducting as shown in Fig. 2d. However, there are two devices conducting in states 1–3 (Fig. 2a–2c). Based on this analysis of four operating states in each converter leg, two operating states can be selected in each half cycle of mains voltage to control the line current with almost unity power factor. During the positive line current, states 1 and 2 are used to generate high voltage level (vdc/2) and low voltage level (0) on the voltage vao. During the negative phase voltage, states 3 and 4 are selected to generate voltage levels 0 (high voltage level) and vdc/2 (low voltage level) on the AC terminal voltage, respectively. During each half cycle of mains voltage, the high voltage level on the AC side is used to decrease the line current and a low voltage level is adopted to increase line current. The same analysis of phase-b and phase-c can be achieved according to the same analysis. The system behaviour of the proposed AC/DC converter can be expressed as 2 3 2 r 32 3 L 0 0 0 0 isa isa r 6 isb 7 6 0 L 0 0 0 76 isb 7 7 6 76 7 d6 6 isc 7 ¼ 6 0 0 Lr 0 0 76 isc 7 7 6 76 7 1 1 dt 6 4 vC 5 4 0 0 0 RC1 RC1 54 vC1 5 1 v C2 0 0 0 RC1 2 RC1 2 v C2 2 vsa vao 3 L 6 vsb vbo 7 7 6 L 6 vsc vco 7 7 6 þ6 L 7 i1 7 6 5 4 C1 Ci32 ð1Þ where vao, vbo and vco are AC terminal to neutral-point voltages and i1 and i3 are DC-side currents. Based on the on and off states of the active switches in the proposed converter, the DC-side currents and AC terminal voltages can be expressed as vao ¼ð1 Sa2 Þsignðvsa ÞvC1 ð1 Sa1 Þ ½1 signðvsa ÞvC2 vbo ¼ð1 Sb2 Þsignðvsb ÞvC1 ð1 Sb1 Þ ½1 signðvsb ÞvC2 vco ¼ð1 Sc2 Þsignðvsc ÞvC1 ð1 Sc1 Þ ½1 signðvsc ÞvC2 i1 ¼ð1 Sa2 Þsignðvsa Þisa þ ð1 Sb2 Þsignðvsb Þisb þ ð1 Sc2 Þsignðvsc Þisc i3 ¼ð1 Sa1 Þ½1 signðvsa Þisa þ ð1 Sb1 Þ ½1 signðvsb Þisb þ ð1 Sc1 Þ½1 signðvsc Þisc
signðvsx Þ ¼
1; vsx 40 ; x ¼ a; b; c 0; vsx o0
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
3 disa 6 dt 7 6 disb 7 7 6 6 dt 7 6 di 7 6 sc 7 6 dt 7 7 6 6 dvC1 7 6 dt 7 5 4 dvC2 2
dt
2
6 6 6 6 6 6 ¼6 6 6 6 6 4
r L
0
0
0
r L
0
0
0
r L
1 Sa2 signðv Þ sa C1
1 Sb2 signðv Þ sb C1
1 Sc2 signðv Þ sc C1
1 C2Sa1 ½1 signðvsa Þ 1 C2Sb1 ½1 signðvsb Þ 3 1 L Sa2 signðvsa Þ 1 LSa1 ½1 signðvsa Þ 7 7 1 L Sb2 signðvsb Þ 1 LSb1 ½1 signðvsb Þ 7 7 7 1 L Sc2 signðvca Þ 1 L Sc1 ½1 signðvsc Þ 7 7 7 1 1 7 RC RC 1 1 5 1 1 RC2
2
isa 6 6 isb 6 6 6 isc 6 4 vC1 vC2
3
1 C2Sc1 ½1 signðvsc Þ
RC2
2 vsa 3 L
7 6 vsb 7 7 6 L 7 7 6 7 7 þ 6 vsc 7 7 6 L 7 7 6 7 5 4 0 5 0
ð8Þ
Figure 3 gives the simplified circuit of the proposed converter. If the switching signals of the active switches are given the state equations (8) can be used to obtain the line current and DC-side voltages vC1 and vC2 by computer simulation. 3
Control scheme
The following functions are implemented: almost unity power factor is achieved; sinusoidal line currents are drawn from the AC sources; constant DC bus voltage is obtained; and the neutral-point voltage on the DC bus is balanced. The internal high-bandwidth current control system is designed to achieve a short settling time and the outer low-bandwidth voltage control system is designed to be somewhat slower.
ð2Þ
3.1
ð3Þ
To achieve the power balance between the AC-source side and DC-load side of the AC/DC converter, a proportionalintegral voltage controller is used to obtain the amplitude of the line current commands. The amplitude of line current command is expressed as Z ð9Þ Is ¼ kp Dvdc þ ki Dvdc dt
ð4Þ
ð5Þ
ð6Þ
where
Based on (1)–(6) the system equations of the proposed converter can be rewritten as
ð7Þ
DC-bus voltage regulation
where kp and ki are proportional and integral gains, respectively, and Dvdc ¼ v*dcvdc is the DC-bus voltage error, v*dc is the voltage command and vdc is the measured DC-side voltage. The parameters of voltage controller can be selected from the given system transfer function and the designed damping factor and natural angular frequency of the voltage response. The voltage error between the voltage command and the measured DC-bus voltage can be reduced by adjusting the amplitude of the line currents. To achieve unity power factor at the input side of the converter, a phase-locked loop circuit generates three unit sinusoidal waves with 1201 phase shift. A VCO- type phaselocked loop IC (CD4066) and a counter IC (CD4040) are 487
(1−Sa1)[sign(vsa )−1]−vC 2
i sa
vsa i so
r
L (1−Sb1)[sign(vsb )−1]−vC 2
i sb
vsb
r
L
(1−Sb2)sign(vsb)vC 1 (1−Sc1)[sign(vsc )−1]−vC 2
i sc
v sc
(1−Sa2)sign(vsa)vC 1
r
L
(1−Sc 2)sign(vsc)vC 1
(1-Sa2)sign(vsa)isa
(1-Sb2)sign(vsb)isb
(1-Sc 2)sign(vsc)isc
(1-Sa1)[1-sign(vsa)]isa
(1-Sb1)[1-sign(vsb)]isb
(1-Sc 1)[1-sign(vsc)]isc
[Sa 2 sign(vsa)+
i1
Sa1(1-sign(vsa))]isa
[Sb2 sign(vsb)+
vC 1
C1
Sb1(1-sign(vsb))]isb R
Fig. 3
[Sc 2 sign(vsc)+ Sc1(1-sign(vsc)]isc
Input-current references are calculated by multiplying the amplitude of the input-current commands and the generated unit sinusoidal waves 2 3 2 3 2 3 ea ðtÞ Is sin ot isa ðtÞ 4 isb ðtÞ 5 ¼ Is 4 eb ðtÞ 5 ¼ 4 Is sinðot 2p=3Þ 5 ð11Þ isc ðtÞ ec ðtÞ Is sinðot þ 2p=3Þ
Neutral-point voltage compensation
To balance the neutral-point voltage under load variation a voltage compensator is used in the control scheme to compensate the neutral-point voltage. This additional current for neutral-point balance is given as ð12Þ Inpc ¼ K½VC2 VC1 where VC1 and VC2 are average voltages across capacitors C1 and C2, respectively, and K is a small gain of the neutralpoint voltage compensator. To avoid a large DC term in the line current command due to unbalance neutral-point voltage, a limiter can be placed after the neutral-point voltage compensator. If the DC capacitor voltage VC2 is greater than VC1 , then a small DC value is added to the linecurrent command. Capacitor voltage VC1 will be increased 488
vC 2 C2
i3
Equivalent circuit of adopted three-phase AC/DC converter
used to achieve an eight-bit signal which is input to the digital signal processor. The digital signal processor generates three balanced sinusoidal waves using a look-up table with the input eight-bit digital signal. These balanced sinusoidal waves are synchronised to three-phase source voltages and expressed as 2 3 2 3 sin ot ea ðtÞ 4 eb ðtÞ 5 ¼ 4 sinðot 2p=3Þ 5 ð10Þ ec ðtÞ sinðot þ 2p=3Þ
3.2
i2
in the next line period. Therefore the capacitor voltage VC1 is compensated. The resultant line-current commands are illustrated as 2 3 3 2 3 2 isa ðtÞ 1 Is sin ot 4 isb ðtÞ 5 ¼ 4 Is sinðot 2p=3Þ 5 þ Inpc 4 1 5 isc ðtÞ 1 Is sinðot þ 2p=3Þ 2 3 Is sinðotÞ þ Inpc ð13Þ ¼ 4 Is sinðot 2p=3Þ þ Inpc 5 Is sinðot þ 2p=3Þ þ Inpc
3.3
Line-current command tracking
Hysteresis current comparators track the input-current references. The appropriate PWM generator obtains the switching signals for the power switches. The line-current errors between the measured line currents and the current commands are sent to the hysteresis comparators to generate the proper PWM signals for active switches. Based on the operation states shown in Fig. 2, there are three voltage levels vdc/2, 0 and vdc/2 generated in each converter leg. One high voltage level and one low voltage level can be selected during the positive and negative half cycle of phase voltage to track the line current command. During the positive half cycle, high voltage levels vdc/2 and low voltage level 0 are generated on the AC terminal to neutral-point voltage. During the negative half cycle, high voltage level 0 and low voltage level vdc/2 are generated on the AC side to control the line current. The high voltage level is adopted to decrease the line current and low voltage level is used to increase the line current. Figure 4a shows the source voltage, line current, PWM signals and AC-side voltage for each converter leg where x ¼ a, b, c. Figure 4b gives the IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
power switch shown in Fig. 4b are expressed as
vsx i*sx
i*sx+h
i*sx −h
isx
sign(vsx )
1 0 1 0 1 0 1 0 vdc /2 0 −vdc /2
hys(isx )
Sx 1 Sx 2 vxo
vsx
< −h
Sx 1 Sx 2 off
>h
Sx 1 Sx 2 off
vsx
<0 hys(isx )
ð15Þ
Sb1 ¼ signðvsb Þ hysðDisb Þ
ð16Þ
Sb2 ¼ signðvsb Þ hysðDisb Þ
ð17Þ
Sc1 ¼ signðvsc Þ hysðDisc Þ
ð18Þ
Sc2 ¼ signðvsc Þ hysðDisc Þ
ð19Þ
1; ifDisx 4h 0; ifDisx o h 1; if vsx 40 signðvsx Þ ¼ 0; if vsx o0
ð20Þ
hysðDisx Þ ¼
4 < −h
Sa2 ¼ signðvsa Þ hysðDisa Þ
ð21Þ
and Disx ¼ i*sxisx, signðvsa Þ ¼ 1 signðvsa Þ, x ¼ a, b, c. Figure 5 gives the block diagram of the proposed control scheme. The DC-bus voltage controller is used to obtain the amplitude of the line current command. Because the system input power factor is controlled to be unity, the current amplitude from the output of DC-bus voltage controller is multiplied with three unit sinusoidal waves in phase with mains voltages. A neutral-point voltage compensator balances the neutral-point voltage. An hysteresis current controller tracks the line-current commands to achieve power factor correction.
Sx 1off, Sx 2 on
hys(isx ) >0
ð14Þ
where
a >h
Sa1 ¼ signðvsa Þ hysðDisa Þ
Simulation and experimental results
Sx 1on, Sx 2 off b
Fig. 4 Phase voltage, current, PWM signals and control strategy for each converter leg
relationship between the measured phase voltage, hysteresis current comparator and the PWM signals for active switches in each converter leg. The PWM signals of active
The proposed three-phase unidirectional AC/DC converter with power factor correction was verified through simulations and experimental results. A computer software package based on MATLAB/SIMULINK simulated the system behaviour. The RMS AC mains voltage is 220 V with 60 Hz; the boost inductance is 3 mH; the capacitance of the two capacitors is 2,200 mF; the hysteresis current band is 0.5 A and the DC-bus voltage vdc is equal to 400 V in the proposed converter. Figure 6 shows the simulated
neutral-point voltage compensator VC 1 VC 2
K
limiter PWM Generator
isa Is v*dc
isa
Sa 2
isb isb
vdc
hys(isa)
isa
i*sa
PI
hys(isb)
isb
i*sb
Sb 2
isc
DC-bus voltage regulator
isc
i*sc
hys(isc)
isc
Sc 2 sin(t) vsa
vsa~vsc PLL
sin(t−2π /3) sin(t+2π /3)
+
sign(vsa) Sa 1
− vsb
+
sign(vsb) Sb 1
− vsc
+ −
Fig. 5
sign(vsc) Sc 1
Block diagram of adopted converter
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
489
vsa
vsa
200V
vsb
vsc
0V 50V
20A 0A
isa
isa
isb
isc 10A
20V
Sa1
0
0V 0V
Sa 2
20V
vao
200V
10ms 0V 5ms a
a vsb
200V
0V
isa
isb
isc
20A 0A
10A
isb 0A Sb1
20V
0V 20V
Sb 2
0V
iso 0A
10ms v bo
200V
0V
5ms b b vsc
200V
vC 1
0V 20A
5V
200V
0A isc 20V
Sc1
0V
Sc 2
0V
vC 2
5V
200V
20V vC 1+vC 2
5V
400V
10ms vco
200V
0V
10ms c c
Fig. 6 Simulated results of phase voltage, line current, PWM signals and AC-side voltage a Converter leg a b Converter leg b c Converter leg c
results of phase voltage, line current, PWM signals and AC terminal to neutral-point voltage in each phase. Power switches Sx2 (x ¼ a, b, c) are active during each positive phase voltage and switches Sx1 are active during each negative phase voltage. Figure 7a shows the simulated results of three-phase mains voltages and line currents. The line currents are balanced and sinusoidal waves with almost unity power factor. Figure 7b gives the simulated threephase line current and neutral-line current. The neutral-line current is close to zero. The DC-bus capacitor voltages are illustrated in Fig. 7c. Two capacitor voltages on the DC side are almost balanced. 490
Fig. 7 Simulated results of proposed converter a Three-phase voltage and line current b Three-phase current and line neutral current c Capacitor voltages on dc side
In the experimental tests a scaled down laboratory prototype circuit was implemented to verify the system performance. The MUR 1560 fast-recovery diode is adopted for the main power diodes Da1BDc2. MOSFETs (IRFP460) are used for the active switches Sa1BSc2. The RMS line voltage of the proposed rectifier is 110 V with 60 Hz; the boost inductance is 3 mH; the capacitance of the two capacitors is 2,200 mF; the hysteresis current band is 0.5 A and the DC-bus voltage vdc is equal to 200 V in the proposed converter. The control parameters of DC-bus voltage controller used in the experimental tests are kp ¼ 0.3 and ki ¼ 6. The gain of neutral-point voltage compensator is K ¼ 0.03. A single-chip digital signal processor (TMS320C32) is adopted as the kernel in the implementation of a digital controller. The control program was written IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
in assembly language and downloaded to the target board. The line voltage, inductor current and capacitor voltages are measured with a potential transformer, current transducer and optocoupler, respectively. Figure 8 shows the threephase mains voltage and current before and after the PWM operation in the proposed converter. Before the PWM operation, three nonsinusoidal line currents are drawn from the AC source.
vsa
isa
vao
before PWM
after PWM vsa isa a vsb vsb
isb vsc isb isc
vbo
Fig. 8 Experimental results of three-phase mains voltage and current before and after PWM operation in the proposed converter vsa, vsb, vsc 100 V/div; isa, isb, isc 10 A/div; time 20 ms/div
After the PWM operation the balanced and sinusoidal line currents with nearly unity power factor are drawn from the AC source. Figure 9 gives the measured results of phase voltage, line current and AC side to neutral-point voltage for each converter leg. Based on the measured results with a power meter analyser, Tables 1 and 2 give the measured power factor and total harmonic distortion under various output loads. The power factor is close to 0.995 and THD is 3.4% at the rated output power. Since the hysteresis comparator is used in the current control loop, the large total harmonic distortion of line current at light load is measured and shown in Table 2. The measured switching frequency range is from 5.2 to 7.5 kHz. Figures 10 shows the experimental results of three-phase voltage and line current under the balanced and unbalanced AC mains voltage. In the proposed control scheme three balanced line currents are drawn from the AC source even if the AC
b
vsc
isc
vco
c
Fig. 9 Measured results of phase voltage, line current and AC-side voltage Table 1: Measured power factor of proposed converter under various output powers Output power (W)
100
200
400
600
800
Power factor
0.98
0.99
0.992 0.994 0.995 0.995
1000
Table 2: Measured THD of proposed converter under various output powers Output power (W) 100
200
400
600
800
1000
Total harmonic distortion (%)
6.1
4.6
4.1
3.7
3.4
7.8
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
a a-phase b b-phase c c-phase
mains voltages are unbalanced. Figure 11 shows the measured source currents including neutral line current before and after the PWM operation in the proposed converter. The neutral line current is almost zero after the PWM operation. Figure 12 gives the measured dynamic voltage response of the proposed converter due to load change from 3 to 5 A. Due to the instant load change the energy stored on the capacitors is discharged to the load. The voltage controller will be used to compensate the DC-bus voltage error with the change of input-current command. Recovery time of 491
vsa
vC1 i sa
vsb
vC2 isb Io
vsc isc load change
a vsa
vsb
vsc
Fig. 12 Measured results of the two capacitor voltages and load current from 3 to 5 A output load change vC1, vC2 20 V/div.; Io 3 A/div.; time 20 ms/div.
5
isa
isb
i sc
b
Fig. 10
Measured results of three-phase voltage and line current.
a Balanced AC mains voltages; vsa, vsb, vsc 100 V/div.; isa, isb, isc 20 A/div.; time 10 ms/div. b Unbalanced AC mains voltages; vsa, vsb, vsc 50 V/div.; isa, isb, isc 10 A/div.; time 4 ms/div.
isa isb isc
iso
Fig. 11 Measured three-phase current and line neutral current before and after PWM operation isa, isb, isc, iso 5 A/div.; time 20 ms/div.
the DC-link voltage due to load change is about three cycles of line frequency. Based on the adopted control scheme two DC-side capacitor voltages are balanced before and after the load variation. 492
Conclusions
A novel three-phase unidirectional AC/DC converter with less power switches has been presented to achieve power factor correction, low current distortion, three-level PWM operation and regulated DC-bus voltage. Two active switches and two diodes are used in each converter leg. Only six switches and six diodes are used in the proposed converter. Three and five different voltage levels are generated on the AC terminal to neutral-point voltages and AC-side line-to-line voltages, respectively. The DC-bus voltage controller is used in the outer loop to achieve the amplitude of line-current command. An hysteresis current controller is used in the inner loop to track the line-current command. The simulation and experimental results show good line-current waveforms with nearly unity power factor and low current harmonics.
6
References
1 Salmon, J.C.: ‘Techniques for minimising the input current distortion of current-controlled single-phase boost rectifier’, IEEE Trans. Power Electron., 1993, 8, (4), pp. 509–520 2 Salmon, J.C.: ‘Circuit topologies for single-phase voltagedoubler boost rectifier’, IEEE Trans. Power Electron., 1993, 8, (4), pp. 521–529 3 Manias, S.: ‘Novel full-bridge semicontrolled switch mode rectifier’, IEE Proc. B, 1991, 138, (5), pp. 252–256 4 Martinez, R., and Enjeti, P.N.: ‘A high-performance single-phase rectifier with input power factor correction’, IEEE Trans. Power Electron., 1996, 11, (2), pp. 311–317 5 Wong, C., Mohan, N., and He, J.: ‘Adaptive phase control for three phase PWM AC to DC converters with constant switching frequency’. Proc. Conf. PCC-Yokohama, Yokohama, Japan, 1993, pp. 73–78 6 Kwon, B.-H., and Min, B.-D.: ‘A fully software-controlled PWM rectifier with current link’, IEEE Trans. Ind. Electron., 1993, 40, (3), pp. 355–363 7 Dawarde, M.S., Kanetkar, V.R., and Dubey, G.: ‘Three-phase switchmode rectifier with hysteresis current control’, IEEE Trans. Power Electron., 1996, 11, (3), pp. 466–471 8 Itoh, R., Ishizaka, K., and Goromaru, T.: ‘Three-phase voltage-source converter with controlled DC for the minimisation of filter capacitance’, IEE Proc.-B, 1990, 137, (5), pp. 327–333 9 Wu, R., Dewan, S.B., and Slemon, G.R.: ‘A PWM AC-DC converter with fixed switching frequency’, IEEE Trans. Ind. Appl., 1990, 26, (5), pp. 880–886 10 Nabae, A., Takahashi, I., and Akagi, H.: ‘A new neutral-point clamped PWM inverter’, IEEE Trans. Ind. Appl., 1981, 17, (5), pp. 518–523 11 Lai, J.S., and Peng, F.Z.: ‘Multilevel converters – a new breed of power converters’, IEEE Trans. Ind. Appl., 1996, 32, (3), pp. 509–551 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
12 Sinha, G., and Lipo, T.A.: ‘A four-level rectifier-inverter system for drive applications’, IEEE Ind. Appl. Mag., 1998, 4, (1), pp. 66–74 13 Lin, B.R., and Yang, T.Y.: ‘Single-phase half-bridge rectifier with power factor correction’, IEE Proc. – Elect. Power Appl., 2004, 151, (4), pp. 443–450
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14 Rodriguez, J., Lai, J.-S., and Peng, F.-Z.: ‘Multilevel inverters: a survey of topologies, controls and applications’, IEEE Trans. Ind. Electron., 2002, 49, (4), pp. 724–738 15 Meynard, T.A., Foch, H., Thomas, P., Courault, J., Jakob, R., and Nahrstaedt, M.: ‘Multicell converters: basic concepts and industry applications’, IEEE Trans. Ind. Electron., 2002, 49, (5), pp. 955–964
493
1
Introduction
Diode or phase-controlled rectifiers are widely utilised in the front-end converter for the uncontrollable or controllable DC-bus voltage in industrial and commercial applications. However, low power factor and nonsinusoidal line currents are drawn from the AC source owing to a large electrolytic capacitor used on the DC link. Power pollutants such as reactive power and current harmonics result in line-voltage distortion, heating of the transformer core and electrical machines, and increased losses in the transmission and distribution line. To meet the relevant standards in Europe and America, several current wave-shaping solutions [1–4] have been proposed to achieve power factor correction and current-harmonic reduction. In [1] conventional singlephase rectifiers with one, two or four switches were used to achieve power factor correction based on two-level (unipolar or bipolar) pulse-width modulation (PWM). In [2] the single-phase voltage-doubler boost rectifiers with one, two, three or four switches were used to achieve power factor correction and DC-bus voltage regulation. The DCbus voltage is twice the peak mains voltage. Switched mode rectifiers with three or four rectifier legs can achieve high power factor and low current harmonics in the three-phase three-wire or four-wire systems. Six or eight power switches are used in the three-leg or four-leg converter of [5–9] to generate bipolar PWM waveforms on the AC terminal. If the bidirectional power flow is not necessary in the application system, switched-mode rectifiers are not a good choice for the large number of power switches. Multilevel rectifiers and inverters have been proposed [10–15] for highpower and medium-voltage applications because they provide advantages such as the low voltage rating of power semiconductors and low voltage harmonics. However, the r IEE, 2005 IEE Proceedings online no. 20045201 doi:10.1049/ip-epa:20045201 Paper first received 28th October 2004 and in final revised form 15th January 2005. Originally published online: 8th April 2005 The authors are with the Power Electronics Research Laboratory, Department of Electrical Engineering, National Yunlin University of Science and Technology, Touliu City, Yunlin 640, Taiwan, ROC IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
disadvantages of the multilevel rectifiers are the large number of power semiconductors in the circuit, a complex control scheme and the neutral-point voltage balance problem. In industrial applications with a unidirectional power flow, conventional multilevel converters are too expensive and complicated to implement. A three-phase three-level AC/DC converter with fewer power switches is presented to achieve almost unity power factor, to regulate the DC-link voltage and to achieve fast dynamic response. Six active switches are required in the proposed converter. Compared with conventional neutralpoint diode-clamped or capacitor-clamped converters the proposed converter has fewer power switches and a simple control scheme. Two control loops are used in the proposed control algorithm: a proportional-integral voltage controller in the outer control loop to maintain the DC-link voltage constant, and an hysteresis-based current controller in the inner control loop to track line-current commands. A voltage compensator is adopted to balance the neutral-point voltage. Three voltage levels are generated on the AC terminal to neutral-point voltages. The effectiveness and validity of the proposed control strategy are verified through computer simulation and experimental results. 2
2.1
System configuration and operation principle
System configuration
Conventional three-level AC/DC converters are based on neutral-point clamped, flying capacitor and series connections of H-bridge topologies. A three-level neutral-point diode-clamped converter needs four active switches and two clamping diodes in each converter leg to achieve power factor correction. A three-level converter with flying capacitor topology needs four active switches and one flying capacitor to draw a sinusoidal line current from the utility system. Figure 1a shows the proposed single-phase unidirectional power flow rectifier to draw a sinusoidal line current with almost unity power factor and maintain the DC-bus voltage constant. There are a boost inductor L, two power diodes Da1 and Da2, two DC-bus capacitors C1 and C2, and two active switches Sa1 and Sa2 in the proposed converter. The voltage stress of switch Sa2 and diode Da2 is equal to half the DC-bus voltage, and the voltage stress of 485
vdc
L, r a
C1 Sa 2 o
Sa1
vsa
i2
Da1
p
isa
i1
Da 2
L, r load
isa
io vC 1
isa
a
C1
vsa
o
vC 2
i2
C2 i3
io vC 1
load
i1
Da 2
vdc vsa > 0
p
vC 2 C2
n
a
n a
Da 2 vdc Da1
vsb
Db 2
L, r
L, r isc
Sb 2
Sb1 Db1
p
io
i2
isa
io vC 1 a
C1 Sa 2 o
vsa
i2
vC 2
vC 2
C2 Dc 2
i3
C2
n
c
n b
Sc 2
Sc1 Dc1
vdc b
Fig. 1
vsa < 0
Proposed unidirectional AC/DC converter
isa
C1
a
C1 Sa1
486
o i2 C2
vC 2
n c vdc vsa < 0
isa
p io vC 1
L, r a
C1
isa o
vsa
i2 vC 2
Da1
C2 i3
n
d
Principle of operation
There are two independent active switches in the proposed converter leg. Unipolar PWM voltage waveforms can be generated on the AC terminal to neutral-point voltages. Before analysis of the proposed converter the following assumptions are made: the power switches are ideal; the supply voltage is constant during one switching period; Sxy ¼ 1 (or 0) if active switch Sxy is turned on (or off), x ¼ aBc, y ¼ 1B2; and the capacitor voltages on the DC side are equal (vC1 ¼ vC2 ¼ vdc/2). In each converter leg there are four operation states shown in Fig. 2 to generate three different voltage levels. Figure 2a gives the equivalent circuit of the first operating state. In this state, positive line current flows through the body diode of active switch Sa1 and diode Da2 to charge capacitor C1. The AC-side voltage vao equals vdc/2. The line current isa is linearly decreasing in this state because the boost inductor voltage is negative
io v
vsa
switch Sa1 and diode Da1 is equal to the DC-bus voltage. No clamping capacitor or diode is needed in the proposed single-phase converter. A unipolar PWM voltage waveform is generated on the voltage vao. Figure 1b shows the system configuration of the proposed three-phase three-level AC/ DC converter. It consists of three converter legs, three boost inductors on the AC side and two capacitors in series on the DC side. Two power switches and two fast recovery diodes are used in each leg. The main functions of the proposed three-phase converter are current harmonic elimination, neutral-point voltage balance, unity power factor and DClink voltage regulation. Two control loops in the system achieve DC-link voltage regulation and line-current tracking. The hysteresis comparators in the inner control loop track the line-current commands. The proportional-integral controller in the outer control loop maintains the DC-link voltage constant.
p
isa
L, r
a Single-phase circuit configuration b Three-phase circuit configuration
2.2
p
L, r
vC 1 C1 o
b
isb
vsc
i1
isa
load
Sa 2
Sa1
vsa > 0
load
isa
iso
vdc
a
load
L, r
load
vsa
Fig. 2 Operating states of proposed single-phase AC/DC converter a State 1 b State 2 c State 3 d State 4
(vL ¼ vsavdc/2o0). Figure 2b gives the equivalent circuit of second operating state. The line current flows through the body diode of active switch Sa1 and active switch Sa2. The AC-side voltage vao equals 0. The boost inductor voltage equals vsa. The line current isa is linearly increasing if the mains voltage vsa is positive. Figure 2c shows the equivalent third operating state. The negative line current flows through switch Sa1 and the body diode of switch Sa2 to obtain AC-side voltage vao ¼ 0. The line current is linearly IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
decreasing because vL ¼ vso0. The equivalent circuit of the fourth operating state is given in Fig. 2d. The line current flows through capacitor C2 and Da1 to generate AC terminal voltage vao ¼ vC2. The negative line current will charge capacitor C2. The boost inductor voltage equals vsa+vC240 such that the line current is linearly increasing. In state 4 only one diode Da1 is conducting as shown in Fig. 2d. However, there are two devices conducting in states 1–3 (Fig. 2a–2c). Based on this analysis of four operating states in each converter leg, two operating states can be selected in each half cycle of mains voltage to control the line current with almost unity power factor. During the positive line current, states 1 and 2 are used to generate high voltage level (vdc/2) and low voltage level (0) on the voltage vao. During the negative phase voltage, states 3 and 4 are selected to generate voltage levels 0 (high voltage level) and vdc/2 (low voltage level) on the AC terminal voltage, respectively. During each half cycle of mains voltage, the high voltage level on the AC side is used to decrease the line current and a low voltage level is adopted to increase line current. The same analysis of phase-b and phase-c can be achieved according to the same analysis. The system behaviour of the proposed AC/DC converter can be expressed as 2 3 2 r 32 3 L 0 0 0 0 isa isa r 6 isb 7 6 0 L 0 0 0 76 isb 7 7 6 76 7 d6 6 isc 7 ¼ 6 0 0 Lr 0 0 76 isc 7 7 6 76 7 1 1 dt 6 4 vC 5 4 0 0 0 RC1 RC1 54 vC1 5 1 v C2 0 0 0 RC1 2 RC1 2 v C2 2 vsa vao 3 L 6 vsb vbo 7 7 6 L 6 vsc vco 7 7 6 þ6 L 7 i1 7 6 5 4 C1 Ci32 ð1Þ where vao, vbo and vco are AC terminal to neutral-point voltages and i1 and i3 are DC-side currents. Based on the on and off states of the active switches in the proposed converter, the DC-side currents and AC terminal voltages can be expressed as vao ¼ð1 Sa2 Þsignðvsa ÞvC1 ð1 Sa1 Þ ½1 signðvsa ÞvC2 vbo ¼ð1 Sb2 Þsignðvsb ÞvC1 ð1 Sb1 Þ ½1 signðvsb ÞvC2 vco ¼ð1 Sc2 Þsignðvsc ÞvC1 ð1 Sc1 Þ ½1 signðvsc ÞvC2 i1 ¼ð1 Sa2 Þsignðvsa Þisa þ ð1 Sb2 Þsignðvsb Þisb þ ð1 Sc2 Þsignðvsc Þisc i3 ¼ð1 Sa1 Þ½1 signðvsa Þisa þ ð1 Sb1 Þ ½1 signðvsb Þisb þ ð1 Sc1 Þ½1 signðvsc Þisc
signðvsx Þ ¼
1; vsx 40 ; x ¼ a; b; c 0; vsx o0
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
3 disa 6 dt 7 6 disb 7 7 6 6 dt 7 6 di 7 6 sc 7 6 dt 7 7 6 6 dvC1 7 6 dt 7 5 4 dvC2 2
dt
2
6 6 6 6 6 6 ¼6 6 6 6 6 4
r L
0
0
0
r L
0
0
0
r L
1 Sa2 signðv Þ sa C1
1 Sb2 signðv Þ sb C1
1 Sc2 signðv Þ sc C1
1 C2Sa1 ½1 signðvsa Þ 1 C2Sb1 ½1 signðvsb Þ 3 1 L Sa2 signðvsa Þ 1 LSa1 ½1 signðvsa Þ 7 7 1 L Sb2 signðvsb Þ 1 LSb1 ½1 signðvsb Þ 7 7 7 1 L Sc2 signðvca Þ 1 L Sc1 ½1 signðvsc Þ 7 7 7 1 1 7 RC RC 1 1 5 1 1 RC2
2
isa 6 6 isb 6 6 6 isc 6 4 vC1 vC2
3
1 C2Sc1 ½1 signðvsc Þ
RC2
2 vsa 3 L
7 6 vsb 7 7 6 L 7 7 6 7 7 þ 6 vsc 7 7 6 L 7 7 6 7 5 4 0 5 0
ð8Þ
Figure 3 gives the simplified circuit of the proposed converter. If the switching signals of the active switches are given the state equations (8) can be used to obtain the line current and DC-side voltages vC1 and vC2 by computer simulation. 3
Control scheme
The following functions are implemented: almost unity power factor is achieved; sinusoidal line currents are drawn from the AC sources; constant DC bus voltage is obtained; and the neutral-point voltage on the DC bus is balanced. The internal high-bandwidth current control system is designed to achieve a short settling time and the outer low-bandwidth voltage control system is designed to be somewhat slower.
ð2Þ
3.1
ð3Þ
To achieve the power balance between the AC-source side and DC-load side of the AC/DC converter, a proportionalintegral voltage controller is used to obtain the amplitude of the line current commands. The amplitude of line current command is expressed as Z ð9Þ Is ¼ kp Dvdc þ ki Dvdc dt
ð4Þ
ð5Þ
ð6Þ
where
Based on (1)–(6) the system equations of the proposed converter can be rewritten as
ð7Þ
DC-bus voltage regulation
where kp and ki are proportional and integral gains, respectively, and Dvdc ¼ v*dcvdc is the DC-bus voltage error, v*dc is the voltage command and vdc is the measured DC-side voltage. The parameters of voltage controller can be selected from the given system transfer function and the designed damping factor and natural angular frequency of the voltage response. The voltage error between the voltage command and the measured DC-bus voltage can be reduced by adjusting the amplitude of the line currents. To achieve unity power factor at the input side of the converter, a phase-locked loop circuit generates three unit sinusoidal waves with 1201 phase shift. A VCO- type phaselocked loop IC (CD4066) and a counter IC (CD4040) are 487
(1−Sa1)[sign(vsa )−1]−vC 2
i sa
vsa i so
r
L (1−Sb1)[sign(vsb )−1]−vC 2
i sb
vsb
r
L
(1−Sb2)sign(vsb)vC 1 (1−Sc1)[sign(vsc )−1]−vC 2
i sc
v sc
(1−Sa2)sign(vsa)vC 1
r
L
(1−Sc 2)sign(vsc)vC 1
(1-Sa2)sign(vsa)isa
(1-Sb2)sign(vsb)isb
(1-Sc 2)sign(vsc)isc
(1-Sa1)[1-sign(vsa)]isa
(1-Sb1)[1-sign(vsb)]isb
(1-Sc 1)[1-sign(vsc)]isc
[Sa 2 sign(vsa)+
i1
Sa1(1-sign(vsa))]isa
[Sb2 sign(vsb)+
vC 1
C1
Sb1(1-sign(vsb))]isb R
Fig. 3
[Sc 2 sign(vsc)+ Sc1(1-sign(vsc)]isc
Input-current references are calculated by multiplying the amplitude of the input-current commands and the generated unit sinusoidal waves 2 3 2 3 2 3 ea ðtÞ Is sin ot isa ðtÞ 4 isb ðtÞ 5 ¼ Is 4 eb ðtÞ 5 ¼ 4 Is sinðot 2p=3Þ 5 ð11Þ isc ðtÞ ec ðtÞ Is sinðot þ 2p=3Þ
Neutral-point voltage compensation
To balance the neutral-point voltage under load variation a voltage compensator is used in the control scheme to compensate the neutral-point voltage. This additional current for neutral-point balance is given as ð12Þ Inpc ¼ K½VC2 VC1 where VC1 and VC2 are average voltages across capacitors C1 and C2, respectively, and K is a small gain of the neutralpoint voltage compensator. To avoid a large DC term in the line current command due to unbalance neutral-point voltage, a limiter can be placed after the neutral-point voltage compensator. If the DC capacitor voltage VC2 is greater than VC1 , then a small DC value is added to the linecurrent command. Capacitor voltage VC1 will be increased 488
vC 2 C2
i3
Equivalent circuit of adopted three-phase AC/DC converter
used to achieve an eight-bit signal which is input to the digital signal processor. The digital signal processor generates three balanced sinusoidal waves using a look-up table with the input eight-bit digital signal. These balanced sinusoidal waves are synchronised to three-phase source voltages and expressed as 2 3 2 3 sin ot ea ðtÞ 4 eb ðtÞ 5 ¼ 4 sinðot 2p=3Þ 5 ð10Þ ec ðtÞ sinðot þ 2p=3Þ
3.2
i2
in the next line period. Therefore the capacitor voltage VC1 is compensated. The resultant line-current commands are illustrated as 2 3 3 2 3 2 isa ðtÞ 1 Is sin ot 4 isb ðtÞ 5 ¼ 4 Is sinðot 2p=3Þ 5 þ Inpc 4 1 5 isc ðtÞ 1 Is sinðot þ 2p=3Þ 2 3 Is sinðotÞ þ Inpc ð13Þ ¼ 4 Is sinðot 2p=3Þ þ Inpc 5 Is sinðot þ 2p=3Þ þ Inpc
3.3
Line-current command tracking
Hysteresis current comparators track the input-current references. The appropriate PWM generator obtains the switching signals for the power switches. The line-current errors between the measured line currents and the current commands are sent to the hysteresis comparators to generate the proper PWM signals for active switches. Based on the operation states shown in Fig. 2, there are three voltage levels vdc/2, 0 and vdc/2 generated in each converter leg. One high voltage level and one low voltage level can be selected during the positive and negative half cycle of phase voltage to track the line current command. During the positive half cycle, high voltage levels vdc/2 and low voltage level 0 are generated on the AC terminal to neutral-point voltage. During the negative half cycle, high voltage level 0 and low voltage level vdc/2 are generated on the AC side to control the line current. The high voltage level is adopted to decrease the line current and low voltage level is used to increase the line current. Figure 4a shows the source voltage, line current, PWM signals and AC-side voltage for each converter leg where x ¼ a, b, c. Figure 4b gives the IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
power switch shown in Fig. 4b are expressed as
vsx i*sx
i*sx+h
i*sx −h
isx
sign(vsx )
1 0 1 0 1 0 1 0 vdc /2 0 −vdc /2
hys(isx )
Sx 1 Sx 2 vxo
vsx
< −h
Sx 1 Sx 2 off
>h
Sx 1 Sx 2 off
vsx
<0 hys(isx )
ð15Þ
Sb1 ¼ signðvsb Þ hysðDisb Þ
ð16Þ
Sb2 ¼ signðvsb Þ hysðDisb Þ
ð17Þ
Sc1 ¼ signðvsc Þ hysðDisc Þ
ð18Þ
Sc2 ¼ signðvsc Þ hysðDisc Þ
ð19Þ
1; ifDisx 4h 0; ifDisx o h 1; if vsx 40 signðvsx Þ ¼ 0; if vsx o0
ð20Þ
hysðDisx Þ ¼
4 < −h
Sa2 ¼ signðvsa Þ hysðDisa Þ
ð21Þ
and Disx ¼ i*sxisx, signðvsa Þ ¼ 1 signðvsa Þ, x ¼ a, b, c. Figure 5 gives the block diagram of the proposed control scheme. The DC-bus voltage controller is used to obtain the amplitude of the line current command. Because the system input power factor is controlled to be unity, the current amplitude from the output of DC-bus voltage controller is multiplied with three unit sinusoidal waves in phase with mains voltages. A neutral-point voltage compensator balances the neutral-point voltage. An hysteresis current controller tracks the line-current commands to achieve power factor correction.
Sx 1off, Sx 2 on
hys(isx ) >0
ð14Þ
where
a >h
Sa1 ¼ signðvsa Þ hysðDisa Þ
Simulation and experimental results
Sx 1on, Sx 2 off b
Fig. 4 Phase voltage, current, PWM signals and control strategy for each converter leg
relationship between the measured phase voltage, hysteresis current comparator and the PWM signals for active switches in each converter leg. The PWM signals of active
The proposed three-phase unidirectional AC/DC converter with power factor correction was verified through simulations and experimental results. A computer software package based on MATLAB/SIMULINK simulated the system behaviour. The RMS AC mains voltage is 220 V with 60 Hz; the boost inductance is 3 mH; the capacitance of the two capacitors is 2,200 mF; the hysteresis current band is 0.5 A and the DC-bus voltage vdc is equal to 400 V in the proposed converter. Figure 6 shows the simulated
neutral-point voltage compensator VC 1 VC 2
K
limiter PWM Generator
isa Is v*dc
isa
Sa 2
isb isb
vdc
hys(isa)
isa
i*sa
PI
hys(isb)
isb
i*sb
Sb 2
isc
DC-bus voltage regulator
isc
i*sc
hys(isc)
isc
Sc 2 sin(t) vsa
vsa~vsc PLL
sin(t−2π /3) sin(t+2π /3)
+
sign(vsa) Sa 1
− vsb
+
sign(vsb) Sb 1
− vsc
+ −
Fig. 5
sign(vsc) Sc 1
Block diagram of adopted converter
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
489
vsa
vsa
200V
vsb
vsc
0V 50V
20A 0A
isa
isa
isb
isc 10A
20V
Sa1
0
0V 0V
Sa 2
20V
vao
200V
10ms 0V 5ms a
a vsb
200V
0V
isa
isb
isc
20A 0A
10A
isb 0A Sb1
20V
0V 20V
Sb 2
0V
iso 0A
10ms v bo
200V
0V
5ms b b vsc
200V
vC 1
0V 20A
5V
200V
0A isc 20V
Sc1
0V
Sc 2
0V
vC 2
5V
200V
20V vC 1+vC 2
5V
400V
10ms vco
200V
0V
10ms c c
Fig. 6 Simulated results of phase voltage, line current, PWM signals and AC-side voltage a Converter leg a b Converter leg b c Converter leg c
results of phase voltage, line current, PWM signals and AC terminal to neutral-point voltage in each phase. Power switches Sx2 (x ¼ a, b, c) are active during each positive phase voltage and switches Sx1 are active during each negative phase voltage. Figure 7a shows the simulated results of three-phase mains voltages and line currents. The line currents are balanced and sinusoidal waves with almost unity power factor. Figure 7b gives the simulated threephase line current and neutral-line current. The neutral-line current is close to zero. The DC-bus capacitor voltages are illustrated in Fig. 7c. Two capacitor voltages on the DC side are almost balanced. 490
Fig. 7 Simulated results of proposed converter a Three-phase voltage and line current b Three-phase current and line neutral current c Capacitor voltages on dc side
In the experimental tests a scaled down laboratory prototype circuit was implemented to verify the system performance. The MUR 1560 fast-recovery diode is adopted for the main power diodes Da1BDc2. MOSFETs (IRFP460) are used for the active switches Sa1BSc2. The RMS line voltage of the proposed rectifier is 110 V with 60 Hz; the boost inductance is 3 mH; the capacitance of the two capacitors is 2,200 mF; the hysteresis current band is 0.5 A and the DC-bus voltage vdc is equal to 200 V in the proposed converter. The control parameters of DC-bus voltage controller used in the experimental tests are kp ¼ 0.3 and ki ¼ 6. The gain of neutral-point voltage compensator is K ¼ 0.03. A single-chip digital signal processor (TMS320C32) is adopted as the kernel in the implementation of a digital controller. The control program was written IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
in assembly language and downloaded to the target board. The line voltage, inductor current and capacitor voltages are measured with a potential transformer, current transducer and optocoupler, respectively. Figure 8 shows the threephase mains voltage and current before and after the PWM operation in the proposed converter. Before the PWM operation, three nonsinusoidal line currents are drawn from the AC source.
vsa
isa
vao
before PWM
after PWM vsa isa a vsb vsb
isb vsc isb isc
vbo
Fig. 8 Experimental results of three-phase mains voltage and current before and after PWM operation in the proposed converter vsa, vsb, vsc 100 V/div; isa, isb, isc 10 A/div; time 20 ms/div
After the PWM operation the balanced and sinusoidal line currents with nearly unity power factor are drawn from the AC source. Figure 9 gives the measured results of phase voltage, line current and AC side to neutral-point voltage for each converter leg. Based on the measured results with a power meter analyser, Tables 1 and 2 give the measured power factor and total harmonic distortion under various output loads. The power factor is close to 0.995 and THD is 3.4% at the rated output power. Since the hysteresis comparator is used in the current control loop, the large total harmonic distortion of line current at light load is measured and shown in Table 2. The measured switching frequency range is from 5.2 to 7.5 kHz. Figures 10 shows the experimental results of three-phase voltage and line current under the balanced and unbalanced AC mains voltage. In the proposed control scheme three balanced line currents are drawn from the AC source even if the AC
b
vsc
isc
vco
c
Fig. 9 Measured results of phase voltage, line current and AC-side voltage Table 1: Measured power factor of proposed converter under various output powers Output power (W)
100
200
400
600
800
Power factor
0.98
0.99
0.992 0.994 0.995 0.995
1000
Table 2: Measured THD of proposed converter under various output powers Output power (W) 100
200
400
600
800
1000
Total harmonic distortion (%)
6.1
4.6
4.1
3.7
3.4
7.8
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
a a-phase b b-phase c c-phase
mains voltages are unbalanced. Figure 11 shows the measured source currents including neutral line current before and after the PWM operation in the proposed converter. The neutral line current is almost zero after the PWM operation. Figure 12 gives the measured dynamic voltage response of the proposed converter due to load change from 3 to 5 A. Due to the instant load change the energy stored on the capacitors is discharged to the load. The voltage controller will be used to compensate the DC-bus voltage error with the change of input-current command. Recovery time of 491
vsa
vC1 i sa
vsb
vC2 isb Io
vsc isc load change
a vsa
vsb
vsc
Fig. 12 Measured results of the two capacitor voltages and load current from 3 to 5 A output load change vC1, vC2 20 V/div.; Io 3 A/div.; time 20 ms/div.
5
isa
isb
i sc
b
Fig. 10
Measured results of three-phase voltage and line current.
a Balanced AC mains voltages; vsa, vsb, vsc 100 V/div.; isa, isb, isc 20 A/div.; time 10 ms/div. b Unbalanced AC mains voltages; vsa, vsb, vsc 50 V/div.; isa, isb, isc 10 A/div.; time 4 ms/div.
isa isb isc
iso
Fig. 11 Measured three-phase current and line neutral current before and after PWM operation isa, isb, isc, iso 5 A/div.; time 20 ms/div.
the DC-link voltage due to load change is about three cycles of line frequency. Based on the adopted control scheme two DC-side capacitor voltages are balanced before and after the load variation. 492
Conclusions
A novel three-phase unidirectional AC/DC converter with less power switches has been presented to achieve power factor correction, low current distortion, three-level PWM operation and regulated DC-bus voltage. Two active switches and two diodes are used in each converter leg. Only six switches and six diodes are used in the proposed converter. Three and five different voltage levels are generated on the AC terminal to neutral-point voltages and AC-side line-to-line voltages, respectively. The DC-bus voltage controller is used in the outer loop to achieve the amplitude of line-current command. An hysteresis current controller is used in the inner loop to track the line-current command. The simulation and experimental results show good line-current waveforms with nearly unity power factor and low current harmonics.
6
References
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12 Sinha, G., and Lipo, T.A.: ‘A four-level rectifier-inverter system for drive applications’, IEEE Ind. Appl. Mag., 1998, 4, (1), pp. 66–74 13 Lin, B.R., and Yang, T.Y.: ‘Single-phase half-bridge rectifier with power factor correction’, IEE Proc. – Elect. Power Appl., 2004, 151, (4), pp. 443–450
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