19673886-slides-pech4-july05

4- 1

Chapter 4 4-1

Designing Feedback Controllers in Switch-Mode DC Power Supplies

Objectives of Feedback Control

4-2 4-3 4-4 4-5 4-6

Review of the Linear Control Theory Linearization of Various Transfer Function Blocks Feedback Controller Design in Voltage-Mode Control Peak-Current Mode Control Feedback Controller Design in DCM References Problems Appendix 4A Bode Plots of Transfer Functions Appendix 4B Transfer Functions in CCM Appendix 4C Derivation of Controller Transfer Functions

© Ned Mohan, 2005

4- 2

OBJECTIVES OF FEEDBACK CONTROL

Vin

DC-DC Converter

Vo

Controller

Vo*

Figure 4-1 Regulated dc power supply. • zero steady state error • fast response • low overshoot • low noise susceptibility. © Ned Mohan, 2005

4- 3

The steps in designing the feedback controller: • Linearize the system for small changes around the dc steady state operating point • Design the feedback controller using linear control theory • Confirm and evaluate the system response by simulations for large disturbances

© Ned Mohan, 2005

4- 4

REVIEW OF LINEAR CONTROL THEORY Vo*

+

∑

vc

Controller −

Pulse Width Modulation

d

Power Stage and Load

vo

PWM-IC k FB

Figure 4-2 Feedback control.

vo (t ) = Vo + vo (t ) d (t ) = D + d (t )

Small signal representation:

vc (t ) = Vc + vc (t ) vo* ( s ) = 0 +

∑

A

Controller

vc ( s)

− B

GC ( s )

PulseWidth Modulator

GPWM ( s )

d ( s )

Power Stage + Output Filter

vo ( s )

GPS ( s )

k FB

Figure 4-3 Small signal control system representation. © Ned Mohan, 2005

4- 5

Loop Transfer Function:

o

Loop Gain Phase ()

Loop Gain Magnitude (dB)

GL ( s ) = GC ( s ) GPWM ( s )GPS ( s ) k FB 50

f

fcc

0

Gain Margin

-50 -100 0 10

10

1

10

2

10

3

10

4

0 -90 Phase Margin -180 -270 10

0

10

1

2

10 Frequency (Hz)

10

3

10

4

Figure 4-4 Definitions of crossover frequency, gain margin and phase margin.

Phase Margin:

φPM = φL © Ned Mohan, 2005

fc

− ( −1800 ) = φL

fc

+ 1800

4- 6

LINEARIZATION OF VARIOUS TRANSFER FUNCTION BLOCKS Linearizing the PWM Controller IC Vˆr

vc q (t )

0

vr (a)

vc ( s )

q (t )

1 Vˆr

vc (t )

vr t 1

0

d ( s )

t

dTs

PWM IC

Ts

(c)

(b)

Figure 4-5 PWM waveforms.

d (t ) =

vc ( t ) Vˆr

vc (t ) = Vc + vc (t )

Vc (t ) vc (t ) d (t ) = + ˆ Vr Vˆr N N © Ned Mohan, 2005

D

d ( t )

d ( s ) 1 GPWM ( s ) = = vc ( s ) Vˆr

4- 7

Example 4-1 In PWM-ICs, there is usually a dc voltage offset in the ramp voltage, and instead of as shown in Fig. 4-5b, a typical Valley-to-Peak value of the ramp signal is defined. In the PWM-IC UC3824, this valley-to-peak value is 1.8 V. Calculate the linearized transfer function associated with this PWM-IC.

Solution

The dc offset in the ramp signal does not change its small signal transfer

function. Hence, the peak-to-valley voltage can be treated as Vˆr . Using Eq. 4-7 GPWM ( s ) =

© Ned Mohan, 2005

1 1 = =0.556 Vˆr 1.8

(4-8)

4- 8

Linearizing the Power Stage of DC-DC Converters in CCM icp (t )

ivp (t )

vvp (t )

d (t ) vcp (t )

1

 dV vp

ivp (t )

vvp (t )

 dI cp

(a )

1

D

(b)

Figure 4-6 Linearizing the switching power-pole.

d (t ) = D + d (t ) vvp (t ) = Vvp + vvp (t ) vcp (t ) = Vcp + vcp (t ) ivp (t ) = I vp + ivp (t ) icp (t ) = I cp + icp (t ) © Ned Mohan, 2005

icp (t )

vcp (t )

4- 9

Linearizing single-switch converters ivp

iL

+ Vin

+ vvp

−

 dV in

+ vcp

r

− − 1: d (t ) iL

+

−

+ vvp

−

Buck

1: D iL

vo r

− − (1 − d (t )) :1

+ vo

 vin = 0 dI L

+ + vcp

Vin −

+ vo

iL

 dV o  dI L

vin = 0

−

+ vo −

Boost

(1 − D ) :1

ivp

iL + vvp

+ vcp

−

−

r

(a)

© Ned Mohan, 2005

 d (Vin + Vo ) iL

− + vo

 dI L

vin = 0 + vo

−

−

Buck-Boost

1: d (t )

1-1.1.1.1.1.1.1.1

+ Vin

1: D (b)

Figure 4-7 Linearizing single-switch converters in CCM.

4- 10

Small signal equivalent circuit for Buck, Boost and Buck-Boost converters Le

veq

r

−

Le = L (Buck) L (Boost and Buck-Boost) Le = 2 (1 − D )

+

1 sC

+

R

vo −

Figure 4-8 Small signal equivalent circuit for Buck, Boost and Buck-Boost converters.

vo Vin =  d LC

1 + srC r 1  1 s2 + s  + +  RC L  LC

vo Vin  Le  1− s  = 2   R d (1 − D ) 

1 + srC   1 r  1  LeC  s 2 + s  + +  RC L L C e  e   

vo Vin  DLe  = 1− s  2   R  d (1 − D )  © Ned Mohan, 2005

(Buck)

1 + srC  2  1 r  1  LeC  s + s  + +  RC L L C e  e   

(Boost)

(Buck-Boost)

4- 11

Using Computer Simulation to Obtain the transfer function Bode Plots Example 4-2 A Buck converter has the following parameters and is operating in CCM: L = 100 µ H , C = 697 µ F , r = 0.1Ω , f s = 100 kHz , Vin = 30V , and Po = 36W . The duty-ratio D is adjusted to regulate the output voltage Vo = 12V . Obtain both the gain and the phase of the power stage GPS ( s ) for the frequencies ranging from 1 Hz to 100 kHz. Ideal Transformer

duty-ratio D

d

Figure 4-9 PSpice Circuit model for a Buck converter. © Ned Mohan, 2005

PSpice Modeling: C:\FirstCourse_PE_Book03\buck_conv_avg.sch

© Ned Mohan, 2005

4- 12

4- 13

Simulation Results 40

0

SEL>> -40 DB(V(V_out)) -0d

-50d

-100d

-150d 1.0Hz 3.0Hz P(V(V_out))

10Hz

30Hz

100Hz

300Hz Frequency

© Ned Mohan, 2005

1.0KHz

3.0KHz

10KHz

30KHz

100KHz

4- 14

40

24.66dB 20

GPS ( s ) dB 0

SEL>> -20

.

DB(V(V_out))

0d

-50d

∠GPS ( s ) -100d

-150d 30Hz P(V(V_out))

−1380 100Hz

300Hz

1.0KHz

3.0KHz

10KHz

Frequency

Figure 4-10 The gain and the phase of the power stage

© Ned Mohan, 2005

30KHz

FEEDBACK CONTROLLER DESIGN IN VOLTAGE-MODE CONTROL

Example 4-3 Design the feedback controller for the Buck converter described in Example 4-2. The PWM-IC is as described in Example 4-1. The output voltage-sensing network in the feedback path has a gain k FB = 0.2 . The steady state error is required to be zero and the phase margin of the loop transfer function should be 600 at as high a crossover frequency as possible. 1. The crossover frequency f c of the open-loop gain is as high as possible to result in a fast response of the closed-loop system. 2. The phase angle of the open-loop transfer function has the specified phase margin, typically 600 at the crossover frequency so that the response in the closed-loop system settles quickly without oscillations. 3. The phase angle of the open-loop transfer function should not drop below −1800 at frequencies below the crossover frequency.

© Ned Mohan, 2005

4- 15

4- 16

Gc ( s ) =

(1 + s / ωz )

kc s

2

1+ s /ω ) ( 

2

p

phase −boost

GC ( s )

GC ( s ) dB

fc

50

0

φboost

∠GC ( s ) -50

0 −90-100

10Hz 30Hz P(V(v_out)) -90

100Hz

300Hz

fz

1.0KHz

f

c Frequency

3.0KHz

fp

10KHz

30KHz

Figure 4-11 Bode plot of GC ( s ) in Eq. 4-18.

© Ned Mohan, 2005

100KHz

4- 17

Step 1: Choose the Crossover Frequency. Choose f c to be slightly beyond the L-C resonance frequency 1/(2π LC ) , which in this example is approximately 600 Hz. Therefore, we will choose f c = 1 kHz . This ensures that the phase angle of the loop remains greater than −1800 at all frequencies.

© Ned Mohan, 2005

4- 18

Step 2: Calculate the needed Phase Boost. The desired phase margin is specified as φ PM = 600 . The required phase boost φboost at the crossover frequency is calculated as follows, noting that

GPWM and k FB produce zero phase shift: ∠GL ( s ) ∠GL ( s ) ∠GC ( s )

fc

= ∠GPS ( s )

+ ∠GC ( s )

(from Eq. 4-2)

(4-19)

fc

= −180o + φ PM

(from Eq. 4-3)

(4-20)

fc

= −90o + φboost

(from Fig. 4-11)

(4-21)

fc

fc

Substituting Eqs. 4-20 and 4-21 into Eq. 4-19,

φboost = −90o + φ PM − ∠GPS ( s ) f In Fig. 4-10, ∠GPS ( s )

φboost = 108o .

© Ned Mohan, 2005

fc

c

(4-22)

 −1380 , substituting which in Eq. 4-22 yields the required phase boost

4- 19

Step 3: Calculate the Controller Gain at the Crossover Frequency. From Eq. 4-2 at the crossover frequency f c GL ( s )

fc

= GC ( s )

fc

× GPWM ( s ) f × GPS ( s ) c

In Fig. 4-10, at f c = 1kHz , GPS ( s )

f c =1 kHz

fc

× k FB = 1

(4-23)

= 24.66 dB = 17.1 . Therefore in Eq. 4-23, using

the gain of the PWM block calculated in Example 4-1, GC ( s ) f × 0.556 N × 17.1 N × 0.2 N =1 c GPWM ( s )

fc

GPS ( s )

fc

(4-24)

k FB

or GC ( s )

© Ned Mohan, 2005

fc

= 0.5263

(4-25)

4- 20 vo* ( s ) = 0 +

∑

A

Controller

vc ( s)

PulseWidth Modulator

− B

GC ( s )

GPWM ( s )

d ( s )

Power Stage + Output Filter

vo ( s )

GPS ( s )

k FB

Figure 4-3 Small signal control system representation.

k Gc ( s ) = c s

(1 + s / ωz )

2

1 + s / ωp ) ( 

2

phase −boost

K boost fz =

ωp = ωz fc

f p = K boost f c

K boost

k c = GC ( s ) © Ned Mohan, 2005

φ   K boost = tan  45o + boost  4  

ωz fc

K boost

4- 21

Implementation of the controller by an op-amp C2 R3

k Gc ( s ) = c s

(1 + s / ωz )

2

1 + s / ωp ) ( 

R2

C1

vo

2

phase −boost

C3

R1

vc

* o

v

Figure 4-12 Implementation of the controller by an op-amp.

C2 = ωz /( kcω p R1 ) C1 = C2 (ω p / ωz − 1) R2 = 1/(ωz C1 ) R3 = R1 /(ω p / ωz − 1) C3 = 1/(ω p R3 ) © Ned Mohan, 2005

4- 22

In this numerical example with f c = 1 kHz , φboost = 108o , and GC ( s )

fc

= 0.5263 , we can

calculate K boost = 3.078 in Eq. 4-27. Using Eqs. 4-27 through 4-30, f z = 324.9 Hz , f p = 3078 Hz , and kc = 349.1 . For the op-amp implementation, we will select

R1 = 100 k Ω . From Eq. 4-30, C2 = 3.0 nF , C1 = 25.6 nF , R2 = 19.1 k Ω , R3 = 11.8 k Ω , and C3 = 4.4 nF .

© Ned Mohan, 2005

4- 23

PSpice model of the Buck converter with voltage-mode control

Figure 4-13 PSpice average model of the Buck converter with voltage-mode control. 12.2V

12.0V

11.8V

11.6V 0s

V(V_out)

5ms

10ms

Time

Figure 4-14 Response to a step-change in load. © Ned Mohan, 2005

PSpice Modeling: C:\FirstCourse_PE_Book03\buck_conv_avg_fb_ctrl_op.sch

© Ned Mohan, 2005

4- 24

4- 25

Simulation Results 12.1V

12.0V

11.9V

11.8V

11.7V 0s

0.5ms V(V_out)

1.0ms

1.5ms

2.0ms

2.5ms

3.0ms Time

© Ned Mohan, 2005

3.5ms

4.0ms

4.5ms

5.0ms

5.5ms

6.0ms

4- 26

PEAK-CURRENT MODE CONTROL •

Peak-Current-Mode Control, and

•

Average-Current-Mode Control. ivp

+ Vin

iL vvp

−

Q

+

+

vcp

vo

−

−

S

Clock

R

− +

Flip-flop

Slope Compensation iL*

ic

Controller

Comparator

Figure 4-15 Peak current mode control.

© Ned Mohan, 2005

vo*

4- 27

ic

slope compensation

iL* iL 0 Clock

t 1 Ts = fs

vo* ( s) = 0

+

∑

−

Controller GC ( s )

iL* ( s )

t (a )

Peak Current Mode Controller

iL ( s )

Power Stage

≈1 (b)

Figure 4-16 Peak-current-mode control with slope compensation.

© Ned Mohan, 2005

vo ( s )

Example 4-4 In this example, we will design a peak-current-mode controller for a Buck-Boost converter that has the following parameters and operating conditions: L = 100 µ H , C = 697 µ F , r = 0.01Ω , f s = 100 kHz , Vin = 30 V .

The output power

Po = 18 W in CCM and the duty-ratio D is adjusted to regulate the output voltage Vo = 12 V . The phase margin required for the voltage loop is 600 . Assume that in the voltage feedback network, k FB = 1 .

Figure 4-17 PSpice circuit for the Buck-Boost converter. © Ned Mohan, 2005

4- 28

4- 29 20

0

GPS ( s ) dB

−29.33dB

-20

-40 DB(V(V_out)/I(L1)) 0d

∠GPS ( s ) |deg -50d

−900 SEL>> -100d 1.0Hz 3.0Hz P(V(V_out)/ I(L1))

10Hz

30Hz

.

100Hz

300Hz

1.0KHz

Frequency

3.0KHz

10KHz

f c = 5 kHz

30KHz

100KHz

Figure 4-18 Bode plot of vo / iL .

As shown in Fig. 4-18, the phase angle of the power-stage transfer function levels off at approximately −900 at ~1kHz . The crossover frequency is chosen to be f c = 5 kHz , at which in Fig. 4-18, ∠GPS ( s )

fc

 −900 .

As explained in the Appendix on the

accompanying CD, the power-stage transfer function vo ( s ) / iL ( s ) of Buck-Boost converters contains a right-half-plane zero in CCM. The crossover frequency is chosen well below the frequency of the right-half-plane zero for reasons discussed in the Appendix. © Ned Mohan, 2005

PSpice Modeling: C:\FirstCourse_PE_Book03\Buck-Boost_Freq_Analysis.sch

© Ned Mohan, 2005

4- 30

4- 31

Simulation Results 20

0

-20

SEL>> -40 DB(V(V_out)/I(L1)) 0d

-50d

-100d 1.0Hz 3.0Hz P(V(V_out)/I(L1))

10Hz

30Hz

100Hz

300Hz Frequency

© Ned Mohan, 2005

1.0KHz

3.0KHz

10KHz

30KHz

100KHz

4- 32

kc Gc ( s ) = s

(1 + s / ωz )

φ   K boost = tan  45o + boost  2   f fz = c f p = K boost f c K boost

1+ s /ω ) ( 

p

phase −boost

k c = ω z GC ( s )

fc

At the crossover frequency, as shown in Fig. 4-18, the power stage transfer function has a gain GPS ( s )

fc

= −29.33 dB . Therefore, at the crossover frequency, by definition, in Fig.

4-16b GC ( s )

fc

GC ( s )

fc

× GPS ( s )

fc

=1

(4-37)

Hence, = 29.33 dB = 29.27

Using the equations above for

(4-38)

f c = 5 kHz , φboost  600 , and

GC ( s )

fc

= 29.27 ,

K boost = 3.732 in Eq. 4-32. Therefore, the parameters in the controller transfer function of Eq. 4-31 are calculated as f z = 1340 Hz , f p = 18660 Hz , and kc = 246.4 × 103 . © Ned Mohan, 2005

4- 33

C2 R2

vo

C1

R1 vc

* o

v

Figure 4-19 Implementation of controller in Eq. 4-32 by an op-amp circuit.

R1 = 10 k Ω C2 =

ωz

ω p R1kc

= 30 pF

C1 = C2 (ω p / ωz − 1) = 380 pF R2 = 1/(ωz C1 ) = 315 k Ω

© Ned Mohan, 2005

4- 34

Figure 4-20 PSpice simulation diagram of the peak-current-mode control. © Ned Mohan, 2005

4- 35

12.04

vo (t ) 12.00

vo (t )

11.96

11.92 2.50ms 2.75ms AVGX(V(Vo),10u)

3.00ms

3.25ms

3.50ms

V(Vo) Time

Figure 4-21 Peak current mode control: Output voltage waveform.

© Ned Mohan, 2005

4- 36

PSpice Modeling: C:\FirstCourse_PE_Book03\bboost_conv_curr_mode_ctrl_opamp.sch

© Ned Mohan, 2005

4- 37

Simulation Results 12.02V

12.00V

11.98V

11.96V

11.94V

11.92V 1.40ms V(Vo)

1.45ms

1.50ms

1.55ms

1.60ms

1.65ms Time

© Ned Mohan, 2005

1.70ms

1.75ms

1.80ms

1.85ms

1.90ms

4- 38

FEEDBACK CONTROLLER DESIGN IN DCM

© Ned Mohan, 2005

4- 39

PSpice Modeling: C:\FirstCourse_PE_Book03\Buck-Boost_CCM_DCM_Freq_Analysis.sch

© Ned Mohan, 2005

4- 40

Simulation Results 80

40

CCM DCM 0

SEL>> -40 DB(V(V_out)) 0d

CCM

DCM -100d

-200d 1.0Hz

3.0Hz P(V(V_out))

10Hz

30Hz

100Hz

300Hz Frequency

© Ned Mohan, 2005

1.0KHz

3.0KHz

10KHz

30KHz

100KHz

4- 41

APPENDIX 4A BODE PLOTS OF TRANSFER FUNCTIONS WITH POLES AND ZEROS

1 T (s) = 1 + s / ωp

4A-1 A Pole in a Transfer Function

20 log10 T ( s ) 0

ωp 10

ωp

10ω p

−10 −20

0

∠T ( s )

−45 −90

Fig. 4A-1 Gain and phase plots of a pole.

© Ned Mohan, 2005

log10 ω

4- 42

4A-2 A Zero in a Transfer Function

T ( s ) = 1 + s / ωz 20 log10 T ( s )

20 10 0

ωz 10

ωz

10ω z

log10 ω

90

∠T ( s ) 45 0

Fig. 4A-2 Gain and phase plots of a zero.

© Ned Mohan, 2005

4- 43

4A-3 A Right-Hand-Plane (RHP) Zero in a Transfer Function

T ( s) = 1 −

s

ωz

20 log10 T ( s ) 20 10 0

ωz 10

ωz

10ω z

log10 ω

0

∠T ( s )

−45 −90

Fig. 4A-3 Gain and phase plots of a right-hand side zero. © Ned Mohan, 2005

4- 44

4A-4 A Double Pole in a Transfer Function

T ( s) =

1  s  1+αs +    ωo 

2

2 0

ζ = 0 .0 5 ζ = 0 .2 5 ζ = 0 .5

0

ζ ζ

-2 0

= 0 .8 0 = 1 .0 0

-4 0 -6 0 -8 0 1 0

1

1 0

2

1 0

3

1 0

4

1 0

5

0

ζ

= 0 .0 5

ζ ζ

-9 0

ζ

= 0 .8 0

ζ

= 0 .2 5 = 0 .5

= 1 .0 0

-1 8 0 1 0

1

1 0

2

1 0

3

1 0

4

1 0

5

Fig.4A-4 Gain and phase plots of a double-pole. © Ned Mohan, 2005