10 A Simple Svpwm Algorithm For Multilevel Inverters

2W4 35th A n n u l IEEE Power Electronics Specialists Conference

Aachen, Germany, 2004

A Simple SVPWM Algorithm for Multilevel Inverters Lei Hu, Hongyan Wang, Yan Deng and Xiangning He College of Electrical Engineering, Zhejiang University Hangzhou, China Email: [email protected]

Abstract-In this paper, a simple space vector pulse width modulation (SVPWM) algorithm for multilevel inverters is proposed. With the proposed method, the three nearest compound vectors can be selected easily and the dwelling time of each vector can be simply calculated for either three-level inverter or inverters with more levels. The simulation and experimentation of a three-level inverter verified its validity.

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with the level increasing. D

INTRODUCTION

In conventional two-level inverter configurations, the harmonic contents reduction of an inverter output current is achieved mainly by increasing the switching frequency. But the switching frequency is restricted by the switching loss in high power and high voltage applications [3]. In such applications, multilevel inverters have been widely used in recent years for the advantage of low harmonic output at low switching frequency. At the same time, low blocking voltage in the switching devices can be achieved. There are three main kinds of multilevel inverter topologies: diode-clamped inverter, flying capacitor inverter and cascaded inverter. Various Pulse Width Modulation (PWM) algorithms have been studied to control the multilevel inverter systems and Space Vector Pulse Width Modulation (SVPWM) method is a valid one. The most significant advantages of SVPWM are fast dvnamic resDonse and wide linear ranxe of fundamental voltage compared with the conventional PWM. But when it is applied to the diode-clamped inverter and flying capacitor inverter, the SVPWM strategy also has to solve the neutral-point voltage unbalance problem. Generally speaking, there are three main steps to obtain the proper switching states during each sample period for the SVPWM method [I-3,5-61: 1) Choose the proper basic vectors. 2) Calculate the dwelling time of each selected vectors. 3) Select the proper sequence of the pulse. It is not easy to implement the steps above directly with the reference voltage vector amplitude and phase, especially in the case of high-level inverters. The most direct way of calculating the time is to decompose all the vectors into real part and imaginary part [SI. Another efficient way is to calculate the time according to reference voltage vector of each phase [3][6]. Many papers discussed the methods to solve the problem and they mainly focus on the last two processes because the first one is fairly simple for the three-level inverters. But for higher level inverters, all the three processes become complex. In [3], a new way was proposed to deal with the inverter as a reduced lower level inverter but the calculation complexity will also increase

Fig. 1. Circuit diagram of a three-level diode-clamped invener

In this paper, a simple method is proposed to implement the processes above and the procedure introduced is common for both the low-level and high-level inverters. The proposed algorithm for a three-level inverter (shown as Fig.1) is verified by simulation and experiment. 11.

Table I shows the possible switching states for the

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0-7803-8399-0/04/$20.00 02004 IEEE.

SIMPLE SVPWM ALGORITHM

statS

St,

P

ON OFF OFF

0

N

Sh ON ON OFF

S,.

S4,

OFF ON ON

OFF OFF ON

V"* V I

Vd2 0

three-level inverter of Fig.1. Three kinds of switching states exist in each phase. Fig.2 shows the basic space voltage vectors of a three-phase three-level inverter [1,3,5,6]. The zero voltage vector V, has three switching states (PPP, 000 and NNN). Each of the small voltage vectors (VI - V,) has two states. Each of the middle vectors (V,, VI,, VI*, VI,, VI,, V18) and the large vectors (V,, V,, VI,, VI,, V,,, VI,) has only one state respectively. The different switching states of the small vectors have different effects on the neutral-point voltage. Generally, in SVPWM techniques, the reference voltage vector V, is located in a triangle, in which three voltage vectors are corresponding to the three apexes. They are selected to minimize the harmonic components of the output

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2004 35th Annual IEEE Power Electronics Specialists Conference

Aachen, Germany, 2004

line-to-line voltage [I]. For example, when V, falls in the triangle formed by the apexes of vectors VI, V7 and V,, which means that V, should be composed of VI, V7 and V,.

(00) Fig. 2. Space vector of the three-level inverter

Universally, a (M+l)-level inverter is discussed here. As shown in Fig.4, by decomposing V, into the m and n axis, it is easy to obtain the values of V, and V, as (3) and (4):

The dwelling time of each vector should satisfy the following equations:

5t , +V, t, + Vats= V,T

(m-1 0) (Vrm0) (m 0) (M 0) Fig. 4. Decomposing the reference vector

(1)

t , +t, +t,=T

(2)

Where T is the sample period and tl, t,, ts are the dwelling time of V,, V7 and Vs respectively. Because ofthe symmetry ofthe six regions, only region A will be analyzed to illustrate how the proposed method works. There are four steps described as follows.

(4) Where V, is the magnitude of the vector V,. It is easy to obtain the relationship between V, and the coordinate scale (Vm, V,) by law of cosine:

v,=

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vm’+vm~-2v,vmcos”

(5) 3

Step 2: Selecting the three nearest vectors.

Assume that V, and V, satisfy the inequalities below (also shown in Fig.4):

(0 0)

0 0)

(20)

Fig. 3. The m-n coardinates of region A

I : Pre-treatment ofthe basic vectors Region A is redrawn for convenience as shown in Fig.3. A new coordinates namely m-n coordinates can be established as illustrated in the figure. Different from the rectangular coordinates, the new coordinates have two axes intersecting with the angle o f d 3 . 0 n l y the first quadrant of the coordinate is used because the vectors located in other regions can be transformed to the first quadrant by clockwise rotating an angle of k*n/3 (k=l, 2, 3 , 4 or 5 for Region B, C, D, E or F respectively). In the new coordinates system, the original voltage vector is represented as the coordinate scale. The basic voltage vectors correspond to the integer scales.

Step

m-I
(6)

n-lcVm
(7)

Where m and n are integers. There are three possible cases: a) V, +Vm<m+n-l . That means V, is located in the left-bottom shadow triangle. The vectors (m-I, n-I), (m-I, n) and (m. n-I) are the nearest vectors and should be chosen. b) V, +V, >m+n-l . That means V, is located in the right-top shadow triangle. The vectors (m-I, n), (m. n- 1) and (m. n) are the nearest vectors and should be chosen. c) V, +V, =m+n-l . Vr lies at the middle line and either a) o r b ) can be chosen.

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20% 35th Annual IEEE Power Electronics Specialists Conference

Step 3: Calculate the dwelling time of the selected vectors.

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modulation or not simply by checking the following inequality:

Here the dwelling time of each vector is calculated. Assume the three nearest vectors are (ma, nl), (m2, n,) and (m3, n3) and tl, tz and t3 are their dwelling time respectively. By solving equation set, the dwelling time of the three selected vectors can finally be yielded as follows:

V, +V, >M ( 1 1) A useful method to deal with over modulation is to replace the vector V, by V; as illustrated in Fig.5. The magnitudes of V;, V’, and V’, are obtained by their original values multiplied by a factor of M/(V,,,, +V,). And the consequent steps are the same as the normal modulation SVPWM. SIMULATION AND EXPERIMENTAL RESULTS

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The simulation of a three-level inverter shown in Fig. I was done under the conditions listed in Table 11. TABLE I1 SIMULATION AND EXPERIMENTAL CONDITIONS

Sam lin time

DC-link volta e

Because the differences among m,, m2 or m3 and the differences among n,, n2 or n3 are either 0 or I , it is very easy to compute the values of expressions (8) to (IO).

Load inductance er hase Load resistance er hase Out ut fre uen Modulation index mi)

50 Hz 0.7 or 0.4

Step 4: Neutral-Point Potential Controls

The neutral point potential balance is very important for the multilevel inverter control. In [3], two methods are summarized to keep the neutral point voltage balance. 1) The first method is to select the proper switching sequence. For example, when V, falls in the triangle formed by the apexes of vectors VI, V, and V,, the switching sequence can be selected as P00-PON-00N-ONN or PPO-P00-PON-00N. The two sequences lead to the same output voltage but have the opposite effects on the neutral-point voltage. 2) The other method is to re-arrange the time distribution of the redundant voltage vectors. Both methods are applicable and the first one is selected at the next part.

Ar e (Vrm’O)(Vrm 0) Fig. 5. Over-modulation mode ~,~

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, J , , ~

Over modulation control

0

However, there is one exception when the reference voltage vector lies outside the hexagon. In this case, the over modulation mode occurs and the output line voltages distort. The following process should be added to step I. It is easy to judge whether the SVPWM is in over

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(b) Fig. 6 . Simulation results for m,=0.7(a) the line voltage and current: (b) the FFT ofthe line voltage (THD=38.0%)

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2004 35th Annual IEEE Power Electronics Specialists Conference

Fig.6 shows the simulation results of the line voltage, current and the FFT result of the line voltage for the modulation index of0.7. Fig.7 shows the simulation result of the line voltage, current and the FFT result ofthe line voltage for the modulation index of 0.4. The Total Harmonic Distortion (THD) is about 38.0% for m,=0.7 and 60.9% for mi=0.4.

Aachen, Germany, 2004

The angle e is in the range of(0, d 3 ) . The values ofk, and

k, were pre-calculated and stored in the ROM, that can greatly reduce the DSP working time. Fig.8 (a) and Fig.9 (a) show the experimental results of line voltage and current for the modulation index of 0.7 and 0.4 respectively. Fig.8 (b) and Fig.9 (b) show the FFT results of the line voltage for the modulation index of 0.7 and 0.4 respectively. The neutral-point voltage is balanced for both cases. The experimental results are coincident with the simulation results, which shows the validity of the proposed control algorithm. CONCLUSION

IV. 0

0.m

0.32

0.01

0

w

4

by simulation and experiment of a three-level inverter. It is obvious that the validity of the algorithm in multilevel inverters with more levels is similar as in three-level inverter. Compared with conventional methods, this method has the advantage of ease implementing, especially for the inverters with more levels.

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A new simple SVPWM method is proposed and verified

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Fig. 1.Simulation results for m d . 4 (a) the line voltage and current; (b) the FFT of the line voltage (THD=60.9%)

A three-level inverter lab prototype was completed to

realize the proposed algorithm with the same conditions listed in Table II. A DSP TMS320F240 was employed to control the inverter. It is hard to implement the calculation tasks of equations (3) and (4) in real time by using the 16-bit fixed-point DSP. The two equations were reformed as:

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Here mi is the modulation index and:

(b) Fig. 8. Experiment results for m,=0.7 (a) the line voltage and current: (b) the FFT of line voltage

k,=-sinO 2M .

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Aachen, Germany, 2094

2004 35th Annual IEEE Power Electronics Specialists Conference

. . . . . . .

[SI 7. Maruyama, M. Kumano, and M. Ashiya, “A new asynchronous PWM methad for a three-level inverler,” in Conf Rec. 1991 IEEE In:. Power Elecrronics Specialists Cont. pp.366-37 I [6] Jae Hyeong Seo, Chang Ho Choi ,“Compensation far the neutral-point potential variation in three-level space vector PWM,” in Conf Rec. 2001 IEEE AppliedPmver Electronics Conference and Exposition, vol. 2, pp.1138-1146

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(b) Fig. 9. Experiment results far m,=0.4 (a) the line voltage and current: (b) the FFT of line voltage

ACKNOWLEDGMENT This work is supported by the National Nature Science Foundation of China (50277035 and 50307012).

REFERENCES M. Koyama, T. Fujii, R. Uchida, and T. Kawabata, “Space voltage vector-based new PWM methad for large capacity three-level GTO inverter,” in Proc. 1992ronf Power ElectronicsandMotion Conlrol, pp.271-276 S. Fukuda, Y.MatSumoto, and A. Sagawa, “Optimal-regulator-based control o f N K boost rectifiers for unity power factor and reduced neutral-point-potential variations,” IEEE Trans. Industrial Electronics, Vol. 46, pp.527-834, June 1999 Jae Hyeong Seo, Chang Ho Choi, 2nd Dong Seok Hyun, “A new simplified space-vector PWM method for three-level inverters,’’ IEEE Trans. Power Electronics. Vol. 16, pp.545-550, July 2001 A. Cataliotli, F. Genduso, G. U.Gallurn, “A new over modulation strategy for high-switching frequency space vector PWM voltage source inverlers,” in Pmc. 2002 IEEE Industrial Elecrronics, Vol. 3, pp.778-783

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